80 lines
1.9 KiB
YAML
80 lines
1.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/mediatek-jpeg-encoder.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek JPEG Encoder
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maintainers:
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- Xia Jiang <xia.jiang@mediatek.com>
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description: |-
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MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
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properties:
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compatible:
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items:
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- enum:
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- mediatek,mt2701-jpgenc
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- mediatek,mt8183-jpgenc
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- mediatek,mt8186-jpgenc
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- mediatek,mt8188-jpgenc
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- const: mediatek,mtk-jpgenc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: jpgenc
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power-domains:
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maxItems: 1
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iommus:
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maxItems: 2
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description: |
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Points to the respective IOMMU block with master port as argument, see
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Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
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Ports are according to the HW.
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dma-ranges:
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maxItems: 1
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description: |
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Describes the physical address space of IOMMU maps to memory.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- power-domains
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- iommus
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mt2701-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/memory/mt2701-larb-port.h>
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#include <dt-bindings/power/mt2701-power.h>
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jpegenc: jpegenc@1500a000 {
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compatible = "mediatek,mt2701-jpgenc",
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"mediatek,mtk-jpgenc";
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reg = <0x1500a000 0x1000>;
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interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&imgsys CLK_IMG_VENC>;
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clock-names = "jpgenc";
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power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
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iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
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<&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;
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};
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