85 lines
2.8 KiB
Plaintext
85 lines
2.8 KiB
Plaintext
* EMIF family of TI SDRAM controllers
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EMIF - External Memory Interface - is an SDRAM controller used in
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TI SoCs. EMIF supports, based on the IP revision, one or more of
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DDR2/DDR3/LPDDR2 protocols. This binding describes a given instance
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of the EMIF IP and memory parts attached to it. Certain revisions
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of the EMIF controller also contain optional ECC support, which
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corrects one bit errors and detects two bit errors.
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Required properties:
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- compatible : Should be of the form "ti,emif-<ip-rev>" where <ip-rev>
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is the IP revision of the specific EMIF instance. For newer controllers,
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compatible should be one of the following:
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"ti,emif-am3352"
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"ti,emif-am4372"
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"ti,emif-dra7xx"
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"ti,emif-keystone"
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- phy-type : <u32> indicating the DDR phy type. Following are the
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allowed values
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<1> : Attila PHY
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<2> : Intelli PHY
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- device-handle : phandle to a "lpddr2" node representing the memory part
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- ti,hwmods : For TI hwmods processing and omap device creation
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the value shall be "emif<n>" where <n> is the number of the EMIF
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instance with base 1.
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- interrupts : interrupt used by the controller
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Required only for "ti,emif-am3352" and "ti,emif-am4372":
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- sram : Phandles for generic sram driver nodes,
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first should be type 'protect-exec' for the driver to use to copy
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and run PM functions, second should be regular pool to be used for
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data region for code. See Documentation/devicetree/bindings/sram/sram.yaml
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for more details.
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Optional properties:
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- cs1-used : Have this property if CS1 of this EMIF
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instance has a memory part attached to it. If there is a memory
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part attached to CS1, it should be the same type as the one on CS0,
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so there is no need to give the details of this memory part.
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- cal-resistor-per-cs : Have this property if the board has one
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calibration resistor per chip-select.
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- hw-caps-read-idle-ctrl: Have this property if the controller
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supports read idle window programming
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- hw-caps-dll-calib-ctrl: Have this property if the controller
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supports dll calibration control
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- hw-caps-ll-interface : Have this property if the controller
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has a low latency interface and corresponding interrupt events
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- hw-caps-temp-alert : Have this property if the controller
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has capability for generating SDRAM temperature alerts
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-Examples:
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emif1: emif@4c000000 {
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compatible = "ti,emif-4d";
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ti,hwmods = "emif2";
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phy-type = <1>;
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device-handle = <&elpida_ECB240ABACN>;
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cs1-used;
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hw-caps-read-idle-ctrl;
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hw-caps-ll-interface;
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hw-caps-temp-alert;
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};
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/* From am33xx.dtsi */
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emif: emif@4c000000 {
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compatible = "ti,emif-am3352";
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reg = <0x4C000000 0x1000>;
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sram = <&pm_sram_code
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&pm_sram_data>;
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};
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emif1: emif@4c000000 {
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compatible = "ti,emif-dra7xx";
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reg = <0x4c000000 0x200>;
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interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
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};
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