185 lines
6.7 KiB
YAML
185 lines
6.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/qcom,msm8996-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm MSM8996 TLMM pin controller
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maintainers:
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- Bjorn Andersson <andersson@kernel.org>
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- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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description:
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Top Level Mode Multiplexer pin controller in Qualcomm MSM8996 SoC.
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properties:
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compatible:
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const: qcom,msm8996-pinctrl
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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interrupt-controller: true
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"#interrupt-cells": true
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gpio-controller: true
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"#gpio-cells": true
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gpio-ranges: true
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wakeup-parent: true
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gpio-reserved-ranges:
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minItems: 1
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maxItems: 75
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gpio-line-names:
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maxItems: 150
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patternProperties:
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"-state$":
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oneOf:
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- $ref: "#/$defs/qcom-msm8996-tlmm-state"
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- patternProperties:
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"-pins$":
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$ref: "#/$defs/qcom-msm8996-tlmm-state"
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additionalProperties: false
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$defs:
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qcom-msm8996-tlmm-state:
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type: object
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description:
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Pinctrl node's client devices use subnodes for desired pin configuration.
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Client device subnodes use below standard properties.
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$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
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properties:
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pins:
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description:
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List of gpio pins affected by the properties specified in this
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subnode.
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items:
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oneOf:
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- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"
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- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,
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sdc2_cmd, sdc2_data ]
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minItems: 1
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maxItems: 36
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function:
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description:
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Specify the alternative function to be configured for the specified
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pins.
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enum: [ gpio, blsp_uart1, blsp_spi1, blsp_i2c1, blsp_uim1, atest_tsens,
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bimc_dte1, dac_calib0, blsp_spi8, blsp_uart8, blsp_uim8,
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qdss_cti_trig_out_b, bimc_dte0, dac_calib1, qdss_cti_trig_in_b,
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dac_calib2, atest_tsens2, atest_usb1, blsp_spi10, blsp_uart10,
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blsp_uim10, atest_bbrx1, atest_usb13, atest_bbrx0, atest_usb12,
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mdp_vsync, edp_lcd, blsp_i2c10, atest_gpsadc1, atest_usb11,
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atest_gpsadc0, edp_hot, atest_usb10, m_voc, dac_gpio,
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atest_char, cam_mclk, pll_bypassnl, qdss_stm7, blsp_i2c8,
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qdss_tracedata_b, pll_reset, qdss_stm6, qdss_stm5, qdss_stm4,
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atest_usb2, cci_i2c, qdss_stm3, dac_calib3, atest_usb23,
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atest_char3, dac_calib4, qdss_stm2, atest_usb22, atest_char2,
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qdss_stm1, dac_calib5, atest_usb21, atest_char1, dbg_out,
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qdss_stm0, dac_calib6, atest_usb20, atest_char0, dac_calib10,
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qdss_stm10, qdss_cti_trig_in_a, cci_timer4, blsp_spi6,
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blsp_uart6, blsp_uim6, blsp2_spi, qdss_stm9,
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qdss_cti_trig_out_a, dac_calib11, qdss_stm8, cci_timer0,
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qdss_stm13, dac_calib7, cci_timer1, qdss_stm12, dac_calib8,
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cci_timer2, blsp1_spi, qdss_stm11, dac_calib9, cci_timer3,
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cci_async, dac_calib12, blsp_i2c6, qdss_tracectl_a,
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dac_calib13, qdss_traceclk_a, dac_calib14, dac_calib15,
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hdmi_rcv, dac_calib16, hdmi_cec, pwr_modem, dac_calib17,
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hdmi_ddc, pwr_nav, dac_calib18, pwr_crypto, dac_calib19,
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hdmi_hot, dac_calib20, dac_calib21, pci_e0, dac_calib22,
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dac_calib23, dac_calib24, tsif1_sync, dac_calib25, sd_write,
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tsif1_error, blsp_spi2, blsp_uart2, blsp_uim2, qdss_cti,
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blsp_i2c2, blsp_spi3, blsp_uart3, blsp_uim3, blsp_i2c3, uim3,
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blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi, blsp_i2c9,
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blsp_spi7, blsp_uart7, blsp_uim7, qdss_tracedata_a, blsp_i2c7,
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qua_mi2s, gcc_gp1_clk_a, ssc_irq, uim4, blsp_spi11,
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blsp_uart11, blsp_uim11, gcc_gp2_clk_a, gcc_gp3_clk_a,
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blsp_i2c11, cri_trng0, cri_trng1, cri_trng, qdss_stm18,
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pri_mi2s, qdss_stm17, blsp_spi4, blsp_uart4, blsp_uim4,
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qdss_stm16, qdss_stm15, blsp_i2c4, qdss_stm14, dac_calib26,
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spkr_i2s, audio_ref, lpass_slimbus, isense_dbg, tsense_pwm1,
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tsense_pwm2, btfm_slimbus, ter_mi2s, qdss_stm22, qdss_stm21,
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qdss_stm20, qdss_stm19, gcc_gp1_clk_b, sec_mi2s, blsp_spi5,
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blsp_uart5, blsp_uim5, gcc_gp2_clk_b, gcc_gp3_clk_b, blsp_i2c5,
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blsp_spi12, blsp_uart12, blsp_uim12, qdss_stm25, qdss_stm31,
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blsp_i2c12, qdss_stm30, qdss_stm29, tsif1_clk, qdss_stm28,
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tsif1_en, tsif1_data, sdc4_cmd, qdss_stm27, qdss_traceclk_b,
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tsif2_error, sdc43, vfr_1, qdss_stm26, tsif2_clk, sdc4_clk,
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qdss_stm24, tsif2_en, sdc42, qdss_stm23, qdss_tracectl_b,
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sd_card, tsif2_data, sdc41, tsif2_sync, sdc40, mdp_vsync_p_b,
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ldo_en, mdp_vsync_s_b, ldo_update, blsp11_uart_tx_b,
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blsp11_uart_rx_b, blsp11_i2c_sda_b, prng_rosc,
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blsp11_i2c_scl_b, uim2, uim1, uim_batt, pci_e2, pa_indicator,
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adsp_ext, ddr_bist, qdss_tracedata_11, qdss_tracedata_12,
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modem_tsync, nav_dr, nav_pps, pci_e1, gsm_tx, qspi_cs, ssbi2,
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ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3 ]
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bias-pull-down: true
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bias-pull-up: true
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bias-disable: true
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drive-strength: true
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input-enable: true
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output-high: true
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output-low: true
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required:
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- pins
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additionalProperties: false
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allOf:
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- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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tlmm: pinctrl@1010000 {
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compatible = "qcom,msm8996-pinctrl";
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reg = <0x01010000 0x300000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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gpio-ranges = <&tlmm 0 0 150>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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blsp1-spi1-default-state {
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spi-pins {
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pins = "gpio0", "gpio1", "gpio3";
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function = "blsp_spi1";
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drive-strength = <12>;
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bias-disable;
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};
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cs-pins {
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pins = "gpio2";
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function = "gpio";
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drive-strength = <16>;
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bias-disable;
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output-high;
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};
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};
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blsp1-spi1-sleep-state {
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pins = "gpio0", "gpio1", "gpio2", "gpio3";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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