57 lines
1.3 KiB
YAML
57 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/renesas/renesas,rzv2m-pwc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas RZ/V2M External Power Sequence Controller (PWC)
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description: |+
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The PWC IP found in the RZ/V2M family of chips comes with the below
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capabilities
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- external power supply on/off sequence generation
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- on/off signal generation for the LPDDR4 core power supply (LPVDD)
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- key input signals processing
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- general-purpose output pins
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maintainers:
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- Fabrizio Castro <fabrizio.castro.jz@renesas.com>
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properties:
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compatible:
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items:
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- enum:
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- renesas,r9a09g011-pwc # RZ/V2M
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- renesas,r9a09g055-pwc # RZ/V2MA
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- const: renesas,rzv2m-pwc
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reg:
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maxItems: 1
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gpio-controller: true
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'#gpio-cells':
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const: 2
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renesas,rzv2m-pwc-power:
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description: The PWC is used to control the system power supplies.
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type: boolean
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required:
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- compatible
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- reg
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- gpio-controller
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- '#gpio-cells'
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additionalProperties: false
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examples:
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- |
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pwc: pwc@a3700000 {
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compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc";
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reg = <0xa3700000 0x800>;
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gpio-controller;
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#gpio-cells = <2>;
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renesas,rzv2m-pwc-power;
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};
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