406 lines
8.7 KiB
Plaintext
406 lines
8.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2017 exceet electronics GmbH
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* Copyright (C) 2018 Kontron Electronics GmbH
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* Copyright (c) 2019 Krzysztof Kozlowski <krzk@kernel.org>
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*/
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#include <dt-bindings/gpio/gpio.h>
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/ {
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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led1 {
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label = "debug-led1";
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gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
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default-state = "off";
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linux,default-trigger = "heartbeat";
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};
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led2 {
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label = "debug-led2";
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gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led3 {
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label = "debug-led3";
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gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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};
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pwm-beeper {
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compatible = "pwm-beeper";
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pwms = <&pwm8 0 5000>;
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};
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reg_3v3: regulator-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "5v";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_otg1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_vref_adc: regulator-vref-adc {
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compatible = "regulator-fixed";
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regulator-name = "vref-adc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&adc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_adc1>;
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vref-supply = <®_vref_adc>;
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status = "okay";
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};
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&can2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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status = "okay";
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};
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&ecspi1 {
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cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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status = "okay";
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eeprom@0 {
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compatible = "anvo,anv32e61w", "atmel,at25";
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reg = <0>;
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spi-max-frequency = <20000000>;
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spi-cpha;
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spi-cpol;
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pagesize = <1>;
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size = <8192>;
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address-width = <16>;
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};
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};
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&fec1 {
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pinctrl-0 = <&pinctrl_enet1>;
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/delete-node/ mdio;
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};
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&fec2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>;
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phy-mode = "rmii";
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phy-handle = <ðphy2>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy1: ethernet-phy@1 {
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reg = <1>;
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micrel,led-mode = <0>;
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clocks = <&clks IMX6UL_CLK_ENET_REF>;
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clock-names = "rmii-ref";
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};
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ethphy2: ethernet-phy@2 {
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reg = <2>;
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micrel,led-mode = <0>;
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clocks = <&clks IMX6UL_CLK_ENET2_REF>;
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clock-names = "rmii-ref";
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};
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};
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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};
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&i2c4 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c4>;
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status = "okay";
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rtc@32 {
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compatible = "epson,rx8900";
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reg = <0x32>;
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};
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};
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&pwm8 {
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#pwm-cells = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm8>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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linux,rs485-enabled-at-boot-time;
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rs485-rx-during-tx;
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rs485-rts-active-low;
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uart-has-rtscts;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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uart-has-rtscts;
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status = "okay";
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};
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart4>;
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status = "okay";
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};
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&usbotg1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg1>;
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dr_mode = "otg";
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srp-disable;
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hnp-disable;
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adp-disable;
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over-current-active-low;
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vbus-supply = <®_usb_otg1_vbus>;
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status = "okay";
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};
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&usbotg2 {
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dr_mode = "host";
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disable-over-current;
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vbus-supply = <®_5v>;
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status = "okay";
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};
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1>;
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cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
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keep-power-in-suspend;
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wakeup-source;
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vmmc-supply = <®_3v3>;
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voltage-ranges = <3300 3300>;
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no-1-8-v;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
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non-removable;
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keep-power-in-suspend;
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wakeup-source;
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vmmc-supply = <®_3v3>;
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voltage-ranges = <3300 3300>;
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no-1-8-v;
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status = "okay";
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};
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&iomuxc {
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pinctrl-0 = <&pinctrl_reset_out &pinctrl_gpio>;
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pinctrl_adc1: adc1grp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
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MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
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MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0xb0
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x100b1
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MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x100b1
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MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK 0x100b1
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MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x100b1 /* ECSPI1-CS1 */
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>;
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};
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pinctrl_enet2: enet2grp {
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fsl,pins = <
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MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
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MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
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MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
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MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
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MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
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MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
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MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
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MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b009
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>;
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};
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pinctrl_enet2_mdio: enet2mdiogrp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
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MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
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>;
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};
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pinctrl_flexcan2: flexcan2grp{
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fsl,pins = <
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MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
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MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
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>;
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};
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pinctrl_gpio: gpiogrp {
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fsl,pins = <
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MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* DOUT1 */
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MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */
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MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x1b0b0 /* DOUT2 */
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MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 /* DIN2 */
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>;
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};
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pinctrl_gpio_leds: gpioledsgrp {
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fsl,pins = <
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MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b0b0 /* LED H14 */
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MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x1b0b0 /* LED H15 */
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MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0 /* LED H16 */
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6UL_PAD_CSI_PIXCLK__I2C1_SCL 0x4001b8b0
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MX6UL_PAD_CSI_MCLK__I2C1_SDA 0x4001b8b0
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>;
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};
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pinctrl_i2c4: i2c4grp {
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fsl,pins = <
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MX6UL_PAD_UART2_TX_DATA__I2C4_SCL 0x4001f8b0
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MX6UL_PAD_UART2_RX_DATA__I2C4_SDA 0x4001f8b0
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>;
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};
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pinctrl_pwm8: pwm8grp {
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fsl,pins = <
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MX6UL_PAD_CSI_HSYNC__PWM8_OUT 0x110b0
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
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MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6UL_PAD_NAND_DATA04__UART2_DCE_TX 0x1b0b1
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MX6UL_PAD_NAND_DATA05__UART2_DCE_RX 0x1b0b1
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MX6UL_PAD_NAND_DATA06__UART2_DCE_CTS 0x1b0b1
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/*
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* mux unused RTS to make sure it doesn't cause
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* any interrupts when it is undefined
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*/
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MX6UL_PAD_NAND_DATA07__UART2_DCE_RTS 0x1b0b1
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
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MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
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MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1
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MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
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>;
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};
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pinctrl_uart4: uart4grp {
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fsl,pins = <
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MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
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MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
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>;
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};
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pinctrl_usbotg1: usbotg1 {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x1b0b0
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
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MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
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MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
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MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
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MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
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MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
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MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x100b1 /* SD1_CD */
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10059
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MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
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MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
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MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
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MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
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MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
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>;
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};
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pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
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fsl,pins = <
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MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9
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MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9
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MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
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MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
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MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
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MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
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>;
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};
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pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
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fsl,pins = <
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MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9
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MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9
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MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
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MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
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MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
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MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
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>;
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};
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};
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