641 lines
14 KiB
Plaintext
641 lines
14 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0 OR X11
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/*
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* Device Tree Include file for TQ-Systems MBa7 carrier board.
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*
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* Copyright (C) 2016 TQ-Systems GmbH
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* Author: Markus Niebel <Markus.Niebel@tq-group.com>
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* Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com>
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*
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* Note: This file does not include nodes for all peripheral devices.
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* As device driver coverage increases additional nodes can be added.
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*/
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/net/ti-dp83867.h>
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/ {
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aliases {
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mmc0 = &usdhc3;
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mmc1 = &usdhc1;
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/delete-property/ mmc2;
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};
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beeper {
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compatible = "gpio-beeper";
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gpios = <&pca9555 0 GPIO_ACTIVE_HIGH>;
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};
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chosen {
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stdout-path = &uart6;
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};
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gpio_buttons: gpio-keys {
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compatible = "gpio-keys";
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button-0 {
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/* #SWITCH_A */
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label = "S11";
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linux,code = <KEY_1>;
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gpios = <&pca9555 13 GPIO_ACTIVE_LOW>;
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};
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button-1 {
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/* #SWITCH_B */
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label = "S12";
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linux,code = <KEY_2>;
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gpios = <&pca9555 14 GPIO_ACTIVE_LOW>;
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};
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button-2 {
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/* #SWITCH_C */
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label = "S13";
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linux,code = <KEY_3>;
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gpios = <&pca9555 15 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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led1 {
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label = "led1";
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gpios = <&pca9555 8 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "default-on";
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};
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led2 {
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label = "led2";
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gpios = <&pca9555 9 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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reg_sd1_vmmc: regulator-sd1-vmmc {
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compatible = "regulator-fixed";
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regulator-name = "VCC3V3_SD1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_fec1_pwdn: regulator-fec1-pwdn {
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compatible = "regulator-fixed";
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regulator-name = "PWDN_FEC1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_fec2_pwdn: regulator-fec2-pwdn {
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compatible = "regulator-fixed";
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regulator-name = "PWDN_FEC2";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
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compatible = "regulator-fixed";
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regulator-name = "VBUS_USBOTG1";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
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compatible = "regulator-fixed";
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regulator-name = "VBUS_USBOTG2";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_mpcie_1v5: regulator-mpcie-1v5 {
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compatible = "regulator-fixed";
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regulator-name = "VCC1V5_MPCIE";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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gpio = <&pca9555 12 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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};
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reg_mpcie_3v3: regulator-mpcie-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "VCC3V3_MPCIE";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&pca9555 10 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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};
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reg_mba_12v0: regulator-mba-12v0 {
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compatible = "regulator-fixed";
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regulator-name = "VCC12V0_MBA7";
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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gpio = <&pca9555 11 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_lvds_transmitter: regulator-lvds-transmitter {
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compatible = "regulator-fixed";
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regulator-name = "#SHTDN_LVDS";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&pca9555 1 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_vref_1v8: regulator-vref-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "VCC1V8_REF";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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vin-supply = <&sw2_reg>;
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};
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reg_audio_3v3: regulator-audio-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "VCC3V3_AUDIO";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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sound {
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compatible = "fsl,imx-audio-tlv320aic32x4";
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model = "imx-audio-tlv320aic32x4";
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ssi-controller = <&sai1>;
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audio-codec = <&tlv320aic32x4>;
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audio-routing =
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"IN3_L", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"IN1_L", "Line In Jack",
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"IN1_R", "Line In Jack",
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"Line Out Jack", "LOL",
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"Line Out Jack", "LOR";
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};
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};
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&adc1 {
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vref-supply = <®_vref_1v8>;
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status = "okay";
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};
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&adc2 {
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vref-supply = <®_vref_1v8>;
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status = "okay";
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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cs-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>, <&gpio4 1 GPIO_ACTIVE_LOW>,
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<&gpio4 2 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2>;
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status = "okay";
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet1>;
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phy-mode = "rgmii-id";
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phy-reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;
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phy-reset-duration = <1>;
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phy-supply = <®_fec1_pwdn>;
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phy-handle = <ðphy1_0>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy1_0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
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};
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};
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};
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&flash0 {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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uboot@0 {
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label = "U-Boot";
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reg = <0x0 0xd0000>;
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};
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env1@d0000 {
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label = "ENV1";
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reg = <0xd0000 0x10000>;
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};
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env2@e0000 {
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label = "ENV2";
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reg = <0xe0000 0x10000>;
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};
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dtb@f0000 {
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label = "DTB";
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reg = <0xf0000 0x10000>;
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};
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linux@100000 {
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label = "Linux";
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reg = <0x100000 0x700000>;
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};
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rootfs@800000 {
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label = "RootFS";
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reg = <0x800000 0x3800000>;
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};
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};
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};
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&flexcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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status = "okay";
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};
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&flexcan2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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status = "okay";
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};
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&i2c1 {
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lm75: temperature-sensor@49 {
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compatible = "national,lm75";
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reg = <0x49>;
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};
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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tlv320aic32x4: audio-codec@18 {
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compatible = "ti,tlv320aic32x4";
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reg = <0x18>;
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clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
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clock-names = "mclk";
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ldoin-supply = <®_audio_3v3>;
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iov-supply = <®_audio_3v3>;
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};
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pca9555: gpio-expander@20 {
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compatible = "nxp,pca9555";
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reg = <0x20>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pca9555>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio7>;
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interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog_mba7_1>;
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x7c
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MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x74
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MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x74
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MX7D_PAD_UART1_RX_DATA__GPIO4_IO0 0x74
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MX7D_PAD_UART1_TX_DATA__GPIO4_IO1 0x74
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MX7D_PAD_UART2_RX_DATA__GPIO4_IO2 0x74
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>;
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};
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pinctrl_ecspi2: ecspi2grp {
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fsl,pins = <
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MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO 0x7c
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MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI 0x74
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MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK 0x74
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MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0 0x74
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>;
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};
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pinctrl_enet1: enet1grp {
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fsl,pins = <
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MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x02
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MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x00
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MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x71
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MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x71
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MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x71
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MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x71
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MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x71
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MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x71
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MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x79
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MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x79
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MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x79
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MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x79
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MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x79
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MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x79
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/* Reset: SION, 100kPU, SRE_FAST, DSE_X1 */
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MX7D_PAD_ENET1_COL__GPIO7_IO15 0x40000070
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/* INT/PWDN: SION, 100kPU, HYS, SRE_FAST, DSE_X1 */
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MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x40000078
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>;
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};
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX 0x5a
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MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX 0x52
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>;
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};
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pinctrl_flexcan2: flexcan2grp {
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fsl,pins = <
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MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x5a
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MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x52
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>;
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};
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pinctrl_hog_mba7_1: hogmba71grp {
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fsl,pins = <
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/* Limitation: WDOG2_B / WDOG2_RESET not usable */
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MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13 0x4000007c
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MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x40000074
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/* #BOOT_EN */
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MX7D_PAD_UART2_TX_DATA__GPIO4_IO3 0x40000010
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX7D_PAD_I2C2_SCL__I2C2_SCL 0x40000078
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MX7D_PAD_I2C2_SDA__I2C2_SDA 0x40000078
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX7D_PAD_I2C3_SCL__I2C3_SCL 0x40000078
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MX7D_PAD_I2C3_SDA__I2C3_SDA 0x40000078
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>;
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};
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pinctrl_pca9555: pca95550grp {
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fsl,pins = <
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MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x78
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>;
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};
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pinctrl_sai1: sai1grp {
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fsl,pins = <
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MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x11
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MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK 0x1c
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MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0 0x1c
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MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC 0x1c
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MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1c
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MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x14
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MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x14
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x7e
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MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x76
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MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS 0x76
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MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x7e
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>;
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};
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pinctrl_uart4: uart4grp {
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fsl,pins = <
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MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX 0x7e
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MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX 0x76
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MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS 0x76
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MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS 0x7e
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>;
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};
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pinctrl_uart5: uart5grp {
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fsl,pins = <
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MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x7e
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MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x76
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>;
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};
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pinctrl_uart6: uart6grp {
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fsl,pins = <
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MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x7d
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MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x75
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MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS 0x75
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MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS 0x7d
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>;
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};
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pinctrl_uart7: uart7grp {
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fsl,pins = <
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MX7D_PAD_EPDC_DATA12__UART7_DCE_RX 0x7e
|
|
MX7D_PAD_EPDC_DATA13__UART7_DCE_TX 0x76
|
|
MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS 0x76
|
|
/* Limitation: RTS is not connected */
|
|
MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS 0x7e
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1_gpio: usdhc1grp_gpio {
|
|
fsl,pins = <
|
|
/* WP */
|
|
MX7D_PAD_SD1_WP__GPIO5_IO1 0x7c
|
|
/* CD */
|
|
MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x7c
|
|
/* VSELECT */
|
|
MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1: usdhc1grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_SD1_CMD__SD1_CMD 0x5e
|
|
MX7D_PAD_SD1_CLK__SD1_CLK 0x57
|
|
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5e
|
|
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5e
|
|
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5e
|
|
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5e
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
|
|
fsl,pins = <
|
|
MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
|
|
MX7D_PAD_SD1_CLK__SD1_CLK 0x57
|
|
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
|
|
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
|
|
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
|
|
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
|
|
fsl,pins = <
|
|
MX7D_PAD_SD1_CMD__SD1_CMD 0x5b
|
|
MX7D_PAD_SD1_CLK__SD1_CLK 0x57
|
|
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b
|
|
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b
|
|
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b
|
|
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b
|
|
>;
|
|
};
|
|
};
|
|
|
|
&iomuxc_lpsr {
|
|
pinctrl_pwm1: pwm1grp {
|
|
fsl,pins = <
|
|
/* LCD_CONTRAST */
|
|
MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x50
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg1: usbotg1grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC 0x5c
|
|
MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x59
|
|
>;
|
|
};
|
|
|
|
pinctrl_wdog1: wdog1grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30
|
|
>;
|
|
};
|
|
};
|
|
|
|
&pwm1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwm1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sai1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_sai1>;
|
|
assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
|
|
<&clks IMX7D_SAI1_ROOT_CLK>;
|
|
assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
|
|
assigned-clock-rates = <0>, <36864000>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart3>;
|
|
assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
|
|
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart4>;
|
|
assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
|
|
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart5 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart5>;
|
|
assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
|
|
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart6 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart6>;
|
|
assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
|
|
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart7 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart7>;
|
|
assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>;
|
|
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
|
|
uart-has-rtscts;
|
|
linux,rs485-enabled-at-boot-time;
|
|
rs485-rts-active-low;
|
|
rs485-rx-during-tx;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbotg1>;
|
|
vbus-supply = <®_usb_otg1_vbus>;
|
|
srp-disable;
|
|
hnp-disable;
|
|
adp-disable;
|
|
over-current-active-low;
|
|
dr_mode = "otg";
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc1 {
|
|
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
|
pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
|
|
pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
|
|
pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
|
|
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
|
|
wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
|
|
vmmc-supply = <®_sd1_vmmc>;
|
|
bus-width = <4>;
|
|
no-1-8-v;
|
|
status = "okay";
|
|
};
|
|
|
|
&wdog1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_wdog1>;
|
|
fsl,ext-reset-output;
|
|
};
|