40 lines
849 B
Plaintext
40 lines
849 B
Plaintext
/*
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* NXP LPC4350 and LPC4330 SoC
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*
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* Copyright 2015 Ariel D'Alessandro <ariel.dalessandro@gmail.com>
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*
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* This code is released using a dual license strategy: BSD/GPL
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* You can choose the licence that better fits your requirements.
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*
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* Released under the terms of 3-clause BSD License
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* Released under the terms of GNU General Public License Version 2.0
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*
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*/
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/ {
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compatible = "nxp,lpc4350", "nxp,lpc4330";
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cpus {
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cpu@0 {
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compatible = "arm,cortex-m4";
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};
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};
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soc {
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sram0: sram@10000000 {
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compatible = "mmio-sram";
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reg = <0x10000000 0x20000>; /* 96 + 32 KiB local SRAM */
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};
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sram1: sram@10080000 {
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compatible = "mmio-sram";
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reg = <0x10080000 0x12000>; /* 64 + 8 KiB local SRAM */
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};
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sram2: sram@20000000 {
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compatible = "mmio-sram";
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reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
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};
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};
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};
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