555 lines
14 KiB
Plaintext
555 lines
14 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Copyright (c) 2019 BayLibre, SAS
|
|
* Author: Neil Armstrong <narmstrong@baylibre.com>
|
|
*/
|
|
|
|
#include "meson-g12-common.dtsi"
|
|
#include <dt-bindings/clock/axg-audio-clkc.h>
|
|
#include <dt-bindings/power/meson-sm1-power.h>
|
|
#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
|
|
#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
|
|
|
|
/ {
|
|
compatible = "amlogic,sm1";
|
|
|
|
tdmif_a: audio-controller-0 {
|
|
compatible = "amlogic,axg-tdm-iface";
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "TDM_A";
|
|
clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
|
|
<&clkc_audio AUD_CLKID_MST_A_SCLK>,
|
|
<&clkc_audio AUD_CLKID_MST_A_LRCLK>;
|
|
clock-names = "mclk", "sclk", "lrclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
tdmif_b: audio-controller-1 {
|
|
compatible = "amlogic,axg-tdm-iface";
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "TDM_B";
|
|
clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
|
|
<&clkc_audio AUD_CLKID_MST_B_SCLK>,
|
|
<&clkc_audio AUD_CLKID_MST_B_LRCLK>;
|
|
clock-names = "mclk", "sclk", "lrclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
tdmif_c: audio-controller-2 {
|
|
compatible = "amlogic,axg-tdm-iface";
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "TDM_C";
|
|
clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
|
|
<&clkc_audio AUD_CLKID_MST_C_SCLK>,
|
|
<&clkc_audio AUD_CLKID_MST_C_LRCLK>;
|
|
clock-names = "mclk", "sclk", "lrclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <0x2>;
|
|
#size-cells = <0x0>;
|
|
|
|
cpu0: cpu@0 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a55";
|
|
reg = <0x0 0x0>;
|
|
enable-method = "psci";
|
|
next-level-cache = <&l2>;
|
|
#cooling-cells = <2>;
|
|
};
|
|
|
|
cpu1: cpu@1 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a55";
|
|
reg = <0x0 0x1>;
|
|
enable-method = "psci";
|
|
next-level-cache = <&l2>;
|
|
#cooling-cells = <2>;
|
|
};
|
|
|
|
cpu2: cpu@2 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a55";
|
|
reg = <0x0 0x2>;
|
|
enable-method = "psci";
|
|
next-level-cache = <&l2>;
|
|
#cooling-cells = <2>;
|
|
};
|
|
|
|
cpu3: cpu@3 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a55";
|
|
reg = <0x0 0x3>;
|
|
enable-method = "psci";
|
|
next-level-cache = <&l2>;
|
|
#cooling-cells = <2>;
|
|
};
|
|
|
|
l2: l2-cache0 {
|
|
compatible = "cache";
|
|
cache-level = <2>;
|
|
};
|
|
};
|
|
|
|
cpu_opp_table: opp-table {
|
|
compatible = "operating-points-v2";
|
|
opp-shared;
|
|
|
|
opp-1000000000 {
|
|
opp-hz = /bits/ 64 <1000000000>;
|
|
opp-microvolt = <770000>;
|
|
};
|
|
|
|
opp-1200000000 {
|
|
opp-hz = /bits/ 64 <1200000000>;
|
|
opp-microvolt = <780000>;
|
|
};
|
|
|
|
opp-1404000000 {
|
|
opp-hz = /bits/ 64 <1404000000>;
|
|
opp-microvolt = <790000>;
|
|
};
|
|
|
|
opp-1500000000 {
|
|
opp-hz = /bits/ 64 <1500000000>;
|
|
opp-microvolt = <800000>;
|
|
};
|
|
|
|
opp-1608000000 {
|
|
opp-hz = /bits/ 64 <1608000000>;
|
|
opp-microvolt = <810000>;
|
|
};
|
|
|
|
opp-1704000000 {
|
|
opp-hz = /bits/ 64 <1704000000>;
|
|
opp-microvolt = <850000>;
|
|
};
|
|
|
|
opp-1800000000 {
|
|
opp-hz = /bits/ 64 <1800000000>;
|
|
opp-microvolt = <900000>;
|
|
};
|
|
|
|
opp-1908000000 {
|
|
opp-hz = /bits/ 64 <1908000000>;
|
|
opp-microvolt = <950000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&apb {
|
|
audio: bus@60000 {
|
|
compatible = "simple-bus";
|
|
reg = <0x0 0x60000 0x0 0x1000>;
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
ranges = <0x0 0x0 0x0 0x60000 0x0 0x1000>;
|
|
|
|
clkc_audio: clock-controller@0 {
|
|
status = "disabled";
|
|
compatible = "amlogic,sm1-audio-clkc";
|
|
reg = <0x0 0x0 0x0 0xb4>;
|
|
#clock-cells = <1>;
|
|
#reset-cells = <1>;
|
|
|
|
clocks = <&clkc CLKID_AUDIO>,
|
|
<&clkc CLKID_MPLL0>,
|
|
<&clkc CLKID_MPLL1>,
|
|
<&clkc CLKID_MPLL2>,
|
|
<&clkc CLKID_MPLL3>,
|
|
<&clkc CLKID_HIFI_PLL>,
|
|
<&clkc CLKID_FCLK_DIV3>,
|
|
<&clkc CLKID_FCLK_DIV4>,
|
|
<&clkc CLKID_FCLK_DIV5>;
|
|
clock-names = "pclk",
|
|
"mst_in0",
|
|
"mst_in1",
|
|
"mst_in2",
|
|
"mst_in3",
|
|
"mst_in4",
|
|
"mst_in5",
|
|
"mst_in6",
|
|
"mst_in7";
|
|
|
|
resets = <&reset RESET_AUDIO>;
|
|
};
|
|
|
|
toddr_a: audio-controller@100 {
|
|
compatible = "amlogic,sm1-toddr",
|
|
"amlogic,axg-toddr";
|
|
reg = <0x0 0x100 0x0 0x2c>;
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "TODDR_A";
|
|
interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
|
|
clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
|
|
resets = <&arb AXG_ARB_TODDR_A>,
|
|
<&clkc_audio AUD_RESET_TODDR_A>;
|
|
reset-names = "arb", "rst";
|
|
amlogic,fifo-depth = <8192>;
|
|
status = "disabled";
|
|
};
|
|
|
|
toddr_b: audio-controller@140 {
|
|
compatible = "amlogic,sm1-toddr",
|
|
"amlogic,axg-toddr";
|
|
reg = <0x0 0x140 0x0 0x2c>;
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "TODDR_B";
|
|
interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
|
|
clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
|
|
resets = <&arb AXG_ARB_TODDR_B>,
|
|
<&clkc_audio AUD_RESET_TODDR_B>;
|
|
reset-names = "arb", "rst";
|
|
amlogic,fifo-depth = <256>;
|
|
status = "disabled";
|
|
};
|
|
|
|
toddr_c: audio-controller@180 {
|
|
compatible = "amlogic,sm1-toddr",
|
|
"amlogic,axg-toddr";
|
|
reg = <0x0 0x180 0x0 0x2c>;
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "TODDR_C";
|
|
interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
|
|
clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
|
|
resets = <&arb AXG_ARB_TODDR_C>,
|
|
<&clkc_audio AUD_RESET_TODDR_C>;
|
|
reset-names = "arb", "rst";
|
|
amlogic,fifo-depth = <256>;
|
|
status = "disabled";
|
|
};
|
|
|
|
frddr_a: audio-controller@1c0 {
|
|
compatible = "amlogic,sm1-frddr",
|
|
"amlogic,axg-frddr";
|
|
reg = <0x0 0x1c0 0x0 0x2c>;
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "FRDDR_A";
|
|
interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
|
|
clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
|
|
resets = <&arb AXG_ARB_FRDDR_A>,
|
|
<&clkc_audio AUD_RESET_FRDDR_A>;
|
|
reset-names = "arb", "rst";
|
|
amlogic,fifo-depth = <512>;
|
|
status = "disabled";
|
|
};
|
|
|
|
frddr_b: audio-controller@200 {
|
|
compatible = "amlogic,sm1-frddr",
|
|
"amlogic,axg-frddr";
|
|
reg = <0x0 0x200 0x0 0x2c>;
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "FRDDR_B";
|
|
interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
|
|
clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
|
|
resets = <&arb AXG_ARB_FRDDR_B>,
|
|
<&clkc_audio AUD_RESET_FRDDR_B>;
|
|
reset-names = "arb", "rst";
|
|
amlogic,fifo-depth = <256>;
|
|
status = "disabled";
|
|
};
|
|
|
|
frddr_c: audio-controller@240 {
|
|
compatible = "amlogic,sm1-frddr",
|
|
"amlogic,axg-frddr";
|
|
reg = <0x0 0x240 0x0 0x2c>;
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "FRDDR_C";
|
|
interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
|
|
clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
|
|
resets = <&arb AXG_ARB_FRDDR_C>,
|
|
<&clkc_audio AUD_RESET_FRDDR_C>;
|
|
reset-names = "arb", "rst";
|
|
amlogic,fifo-depth = <256>;
|
|
status = "disabled";
|
|
};
|
|
|
|
arb: reset-controller@280 {
|
|
status = "disabled";
|
|
compatible = "amlogic,meson-sm1-audio-arb";
|
|
reg = <0x0 0x280 0x0 0x4>;
|
|
#reset-cells = <1>;
|
|
clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
|
|
};
|
|
|
|
tdmin_a: audio-controller@300 {
|
|
compatible = "amlogic,sm1-tdmin",
|
|
"amlogic,axg-tdmin";
|
|
reg = <0x0 0x300 0x0 0x40>;
|
|
sound-name-prefix = "TDMIN_A";
|
|
resets = <&clkc_audio AUD_RESET_TDMIN_A>;
|
|
clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
|
|
clock-names = "pclk", "sclk", "sclk_sel",
|
|
"lrclk", "lrclk_sel";
|
|
status = "disabled";
|
|
};
|
|
|
|
tdmin_b: audio-controller@340 {
|
|
compatible = "amlogic,sm1-tdmin",
|
|
"amlogic,axg-tdmin";
|
|
reg = <0x0 0x340 0x0 0x40>;
|
|
sound-name-prefix = "TDMIN_B";
|
|
resets = <&clkc_audio AUD_RESET_TDMIN_B>;
|
|
clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
|
|
clock-names = "pclk", "sclk", "sclk_sel",
|
|
"lrclk", "lrclk_sel";
|
|
status = "disabled";
|
|
};
|
|
|
|
tdmin_c: audio-controller@380 {
|
|
compatible = "amlogic,sm1-tdmin",
|
|
"amlogic,axg-tdmin";
|
|
reg = <0x0 0x380 0x0 0x40>;
|
|
sound-name-prefix = "TDMIN_C";
|
|
resets = <&clkc_audio AUD_RESET_TDMIN_C>;
|
|
clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
|
|
clock-names = "pclk", "sclk", "sclk_sel",
|
|
"lrclk", "lrclk_sel";
|
|
status = "disabled";
|
|
};
|
|
|
|
tdmin_lb: audio-controller@3c0 {
|
|
compatible = "amlogic,sm1-tdmin",
|
|
"amlogic,axg-tdmin";
|
|
reg = <0x0 0x3c0 0x0 0x40>;
|
|
sound-name-prefix = "TDMIN_LB";
|
|
resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
|
|
clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
|
|
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
|
|
clock-names = "pclk", "sclk", "sclk_sel",
|
|
"lrclk", "lrclk_sel";
|
|
status = "disabled";
|
|
};
|
|
|
|
spdifin: audio-controller@400 {
|
|
compatible = "amlogic,g12a-spdifin",
|
|
"amlogic,axg-spdifin";
|
|
reg = <0x0 0x400 0x0 0x30>;
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "SPDIFIN";
|
|
interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
|
|
clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
|
|
<&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
|
|
clock-names = "pclk", "refclk";
|
|
resets = <&clkc_audio AUD_RESET_SPDIFIN>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spdifout_a: audio-controller@480 {
|
|
compatible = "amlogic,g12a-spdifout",
|
|
"amlogic,axg-spdifout";
|
|
reg = <0x0 0x480 0x0 0x50>;
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "SPDIFOUT_A";
|
|
clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
|
|
<&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
|
|
clock-names = "pclk", "mclk";
|
|
resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
|
|
status = "disabled";
|
|
};
|
|
|
|
tdmout_a: audio-controller@500 {
|
|
compatible = "amlogic,sm1-tdmout";
|
|
reg = <0x0 0x500 0x0 0x40>;
|
|
sound-name-prefix = "TDMOUT_A";
|
|
resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
|
|
clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
|
|
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
|
|
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
|
|
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
|
|
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
|
|
clock-names = "pclk", "sclk", "sclk_sel",
|
|
"lrclk", "lrclk_sel";
|
|
status = "disabled";
|
|
};
|
|
|
|
tdmout_b: audio-controller@540 {
|
|
compatible = "amlogic,sm1-tdmout";
|
|
reg = <0x0 0x540 0x0 0x40>;
|
|
sound-name-prefix = "TDMOUT_B";
|
|
resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
|
|
clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
|
|
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
|
|
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
|
|
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
|
|
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
|
|
clock-names = "pclk", "sclk", "sclk_sel",
|
|
"lrclk", "lrclk_sel";
|
|
status = "disabled";
|
|
};
|
|
|
|
tdmout_c: audio-controller@580 {
|
|
compatible = "amlogic,sm1-tdmout";
|
|
reg = <0x0 0x580 0x0 0x40>;
|
|
sound-name-prefix = "TDMOUT_C";
|
|
resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
|
|
clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
|
|
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
|
|
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
|
|
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
|
|
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
|
|
clock-names = "pclk", "sclk", "sclk_sel",
|
|
"lrclk", "lrclk_sel";
|
|
status = "disabled";
|
|
};
|
|
|
|
toacodec: audio-controller@740 {
|
|
compatible = "amlogic,sm1-toacodec",
|
|
"amlogic,g12a-toacodec";
|
|
reg = <0x0 0x740 0x0 0x4>;
|
|
#sound-dai-cells = <1>;
|
|
sound-name-prefix = "TOACODEC";
|
|
resets = <&clkc_audio AUD_RESET_TOACODEC>;
|
|
status = "disabled";
|
|
};
|
|
|
|
tohdmitx: audio-controller@744 {
|
|
compatible = "amlogic,sm1-tohdmitx",
|
|
"amlogic,g12a-tohdmitx";
|
|
reg = <0x0 0x744 0x0 0x4>;
|
|
#sound-dai-cells = <1>;
|
|
sound-name-prefix = "TOHDMITX";
|
|
resets = <&clkc_audio AUD_RESET_TOHDMITX>;
|
|
status = "disabled";
|
|
};
|
|
|
|
toddr_d: audio-controller@840 {
|
|
compatible = "amlogic,sm1-toddr",
|
|
"amlogic,axg-toddr";
|
|
reg = <0x0 0x840 0x0 0x2c>;
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "TODDR_D";
|
|
interrupts = <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
|
|
clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
|
|
resets = <&arb AXG_ARB_TODDR_D>,
|
|
<&clkc_audio AUD_RESET_TODDR_D>;
|
|
reset-names = "arb", "rst";
|
|
amlogic,fifo-depth = <256>;
|
|
status = "disabled";
|
|
};
|
|
|
|
frddr_d: audio-controller@880 {
|
|
compatible = "amlogic,sm1-frddr",
|
|
"amlogic,axg-frddr";
|
|
reg = <0x0 0x880 0x0 0x2c>;
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "FRDDR_D";
|
|
interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
|
|
clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
|
|
resets = <&arb AXG_ARB_FRDDR_D>,
|
|
<&clkc_audio AUD_RESET_FRDDR_D>;
|
|
reset-names = "arb", "rst";
|
|
amlogic,fifo-depth = <256>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
pdm: audio-controller@61000 {
|
|
compatible = "amlogic,sm1-pdm",
|
|
"amlogic,axg-pdm";
|
|
reg = <0x0 0x61000 0x0 0x34>;
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "PDM";
|
|
clocks = <&clkc_audio AUD_CLKID_PDM>,
|
|
<&clkc_audio AUD_CLKID_PDM_DCLK>,
|
|
<&clkc_audio AUD_CLKID_PDM_SYSCLK>;
|
|
clock-names = "pclk", "dclk", "sysclk";
|
|
resets = <&clkc_audio AUD_RESET_PDM>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
&cecb_AO {
|
|
compatible = "amlogic,meson-sm1-ao-cec";
|
|
};
|
|
|
|
&clk_msr {
|
|
compatible = "amlogic,meson-sm1-clk-measure";
|
|
};
|
|
|
|
|
|
&clkc {
|
|
compatible = "amlogic,sm1-clkc";
|
|
};
|
|
|
|
&cpu_thermal {
|
|
cooling-maps {
|
|
map0 {
|
|
trip = <&cpu_passive>;
|
|
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
};
|
|
|
|
map1 {
|
|
trip = <&cpu_hot>;
|
|
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
};
|
|
};
|
|
};
|
|
|
|
ðmac {
|
|
power-domains = <&pwrc PWRC_SM1_ETH_ID>;
|
|
};
|
|
|
|
&gpio_intc {
|
|
compatible = "amlogic,meson-sm1-gpio-intc",
|
|
"amlogic,meson-gpio-intc";
|
|
};
|
|
|
|
&pcie {
|
|
power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
|
|
};
|
|
|
|
&pmu {
|
|
compatible = "amlogic,sm1-ddr-pmu";
|
|
};
|
|
|
|
&pwrc {
|
|
compatible = "amlogic,meson-sm1-pwrc";
|
|
};
|
|
|
|
&simplefb_cvbs {
|
|
power-domains = <&pwrc PWRC_SM1_VPU_ID>;
|
|
};
|
|
|
|
&simplefb_hdmi {
|
|
power-domains = <&pwrc PWRC_SM1_VPU_ID>;
|
|
};
|
|
|
|
&vdec {
|
|
compatible = "amlogic,sm1-vdec";
|
|
};
|
|
|
|
&vpu {
|
|
power-domains = <&pwrc PWRC_SM1_VPU_ID>;
|
|
};
|
|
|
|
&usb {
|
|
power-domains = <&pwrc PWRC_SM1_USB_ID>;
|
|
};
|
|
|
|
&npu {
|
|
power-domains = <&pwrc PWRC_SM1_NNA_ID>;
|
|
};
|