149 lines
3.5 KiB
C
149 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 1999, 2000, 2004 MIPS Technologies, Inc.
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* All rights reserved.
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* Authors: Carsten Langgaard <carstenl@mips.com>
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* Maciej W. Rozycki <macro@mips.com>
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*
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* MIPS boards specific PCI support.
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*/
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <asm/mips-boards/bonito64.h>
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#define PCI_ACCESS_READ 0
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#define PCI_ACCESS_WRITE 1
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#define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(_pcictrl_bonito_pcicfg + (offset))
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#define ID_SEL_BEGIN 10
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#define MAX_DEV_NUM (31 - ID_SEL_BEGIN)
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static int bonito64_pcibios_config_access(unsigned char access_type,
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struct pci_bus *bus,
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unsigned int devfn, int where,
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u32 * data)
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{
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u32 busnum = bus->number;
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u32 addr, type;
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u32 dummy;
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void *addrp;
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int device = PCI_SLOT(devfn);
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int function = PCI_FUNC(devfn);
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int reg = where & ~3;
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if (busnum == 0) {
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/* Type 0 configuration for onboard PCI bus */
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if (device > MAX_DEV_NUM)
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return -1;
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addr = (1 << (device + ID_SEL_BEGIN)) | (function << 8) | reg;
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type = 0;
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} else {
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/* Type 1 configuration for offboard PCI bus */
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addr = (busnum << 16) | (device << 11) | (function << 8) | reg;
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type = 0x10000;
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}
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/* Clear aborts */
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BONITO_PCICMD |= BONITO_PCICMD_MABORT_CLR | BONITO_PCICMD_MTABORT_CLR;
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BONITO_PCIMAP_CFG = (addr >> 16) | type;
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/* Flush Bonito register block */
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dummy = BONITO_PCIMAP_CFG;
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mmiowb();
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addrp = CFG_SPACE_REG(addr & 0xffff);
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if (access_type == PCI_ACCESS_WRITE) {
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writel(cpu_to_le32(*data), addrp);
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/* Wait till done */
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while (BONITO_PCIMSTAT & 0xF);
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} else {
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*data = le32_to_cpu(readl(addrp));
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}
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/* Detect Master/Target abort */
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if (BONITO_PCICMD & (BONITO_PCICMD_MABORT_CLR |
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BONITO_PCICMD_MTABORT_CLR)) {
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/* Error occurred */
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/* Clear bits */
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BONITO_PCICMD |= (BONITO_PCICMD_MABORT_CLR |
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BONITO_PCICMD_MTABORT_CLR);
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return -1;
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}
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return 0;
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}
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/*
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* We can't address 8 and 16 bit words directly. Instead we have to
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* read/write a 32bit word and mask/modify the data we actually want.
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*/
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static int bonito64_pcibios_read(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 * val)
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{
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u32 data = 0;
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if ((size == 2) && (where & 1))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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else if ((size == 4) && (where & 3))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
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&data))
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return -1;
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if (size == 1)
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*val = (data >> ((where & 3) << 3)) & 0xff;
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else if (size == 2)
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*val = (data >> ((where & 3) << 3)) & 0xffff;
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else
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*val = data;
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return PCIBIOS_SUCCESSFUL;
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}
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static int bonito64_pcibios_write(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 val)
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{
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u32 data = 0;
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if ((size == 2) && (where & 1))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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else if ((size == 4) && (where & 3))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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if (size == 4)
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data = val;
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else {
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if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
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where, &data))
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return -1;
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if (size == 1)
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data = (data & ~(0xff << ((where & 3) << 3))) |
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(val << ((where & 3) << 3));
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else if (size == 2)
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data = (data & ~(0xffff << ((where & 3) << 3))) |
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(val << ((where & 3) << 3));
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}
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if (bonito64_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where,
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&data))
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return -1;
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return PCIBIOS_SUCCESSFUL;
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}
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struct pci_ops bonito64_pci_ops = {
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.read = bonito64_pcibios_read,
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.write = bonito64_pcibios_write
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};
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