150 lines
5.2 KiB
C
150 lines
5.2 KiB
C
/*
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* Copyright 2012-17 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include "dcn201_hubp.h"
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#include "dm_services.h"
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#include "dce_calcs.h"
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#include "reg_helper.h"
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#include "basics/conversion.h"
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#define REG(reg)\
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hubp201->hubp_regs->reg
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#define CTX \
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hubp201->base.ctx
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#undef FN
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#define FN(reg_name, field_name) \
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hubp201->hubp_shift->field_name, hubp201->hubp_mask->field_name
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static void hubp201_program_surface_config(
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struct hubp *hubp,
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enum surface_pixel_format format,
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union dc_tiling_info *tiling_info,
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struct plane_size *plane_size,
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enum dc_rotation_angle rotation,
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struct dc_plane_dcc_param *dcc,
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bool horizontal_mirror,
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unsigned int compat_level)
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{
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hubp1_dcc_control(hubp, dcc->enable, dcc->independent_64b_blks);
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hubp1_program_tiling(hubp, tiling_info, format);
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hubp1_program_size(hubp, format, plane_size, dcc);
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hubp1_program_pixel_format(hubp, format);
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}
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static void hubp201_program_deadline(
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struct hubp *hubp,
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struct _vcs_dpi_display_dlg_regs_st *dlg_attr,
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struct _vcs_dpi_display_ttu_regs_st *ttu_attr)
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{
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hubp1_program_deadline(hubp, dlg_attr, ttu_attr);
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}
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static void hubp201_program_requestor(struct hubp *hubp,
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struct _vcs_dpi_display_rq_regs_st *rq_regs)
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{
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struct dcn201_hubp *hubp201 = TO_DCN201_HUBP(hubp);
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REG_UPDATE(HUBPRET_CONTROL,
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DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address);
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REG_SET_4(DCN_EXPANSION_MODE, 0,
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DRQ_EXPANSION_MODE, rq_regs->drq_expansion_mode,
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PRQ_EXPANSION_MODE, rq_regs->prq_expansion_mode,
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MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode,
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CRQ_EXPANSION_MODE, rq_regs->crq_expansion_mode);
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REG_SET_5(DCHUBP_REQ_SIZE_CONFIG, 0,
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CHUNK_SIZE, rq_regs->rq_regs_l.chunk_size,
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MIN_CHUNK_SIZE, rq_regs->rq_regs_l.min_chunk_size,
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META_CHUNK_SIZE, rq_regs->rq_regs_l.meta_chunk_size,
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MIN_META_CHUNK_SIZE, rq_regs->rq_regs_l.min_meta_chunk_size,
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SWATH_HEIGHT, rq_regs->rq_regs_l.swath_height);
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REG_SET_5(DCHUBP_REQ_SIZE_CONFIG_C, 0,
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CHUNK_SIZE_C, rq_regs->rq_regs_c.chunk_size,
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MIN_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_chunk_size,
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META_CHUNK_SIZE_C, rq_regs->rq_regs_c.meta_chunk_size,
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MIN_META_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_meta_chunk_size,
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SWATH_HEIGHT_C, rq_regs->rq_regs_c.swath_height);
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}
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static void hubp201_setup(
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struct hubp *hubp,
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struct _vcs_dpi_display_dlg_regs_st *dlg_attr,
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struct _vcs_dpi_display_ttu_regs_st *ttu_attr,
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struct _vcs_dpi_display_rq_regs_st *rq_regs,
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struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest)
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{
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hubp2_vready_at_or_After_vsync(hubp, pipe_dest);
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hubp201_program_requestor(hubp, rq_regs);
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hubp201_program_deadline(hubp, dlg_attr, ttu_attr);
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}
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static struct hubp_funcs dcn201_hubp_funcs = {
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.hubp_enable_tripleBuffer = hubp2_enable_triplebuffer,
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.hubp_is_triplebuffer_enabled = hubp2_is_triplebuffer_enabled,
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.hubp_program_surface_flip_and_addr = hubp1_program_surface_flip_and_addr,
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.hubp_program_surface_config = hubp201_program_surface_config,
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.hubp_is_flip_pending = hubp1_is_flip_pending,
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.hubp_setup = hubp201_setup,
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.hubp_setup_interdependent = hubp2_setup_interdependent,
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.set_cursor_attributes = hubp2_cursor_set_attributes,
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.set_cursor_position = hubp1_cursor_set_position,
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.set_blank = hubp1_set_blank,
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.dcc_control = hubp1_dcc_control,
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.mem_program_viewport = min_set_viewport,
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.hubp_clk_cntl = hubp1_clk_cntl,
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.hubp_vtg_sel = hubp1_vtg_sel,
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.dmdata_set_attributes = hubp2_dmdata_set_attributes,
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.dmdata_load = hubp2_dmdata_load,
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.dmdata_status_done = hubp2_dmdata_status_done,
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.hubp_read_state = hubp2_read_state,
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.hubp_clear_underflow = hubp1_clear_underflow,
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.hubp_set_flip_control_surface_gsl = hubp2_set_flip_control_surface_gsl,
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.hubp_init = hubp1_init,
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};
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bool dcn201_hubp_construct(
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struct dcn201_hubp *hubp201,
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struct dc_context *ctx,
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uint32_t inst,
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const struct dcn201_hubp_registers *hubp_regs,
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const struct dcn201_hubp_shift *hubp_shift,
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const struct dcn201_hubp_mask *hubp_mask)
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{
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hubp201->base.funcs = &dcn201_hubp_funcs;
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hubp201->base.ctx = ctx;
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hubp201->hubp_regs = hubp_regs;
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hubp201->hubp_shift = hubp_shift;
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hubp201->hubp_mask = hubp_mask;
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hubp201->base.inst = inst;
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hubp201->base.opp_id = OPP_ID_INVALID;
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hubp201->base.mpcc_id = 0xf;
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return true;
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}
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