136 lines
4.1 KiB
C
136 lines
4.1 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef SMU8_FUSION_H
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#define SMU8_FUSION_H
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#include "smu8.h"
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#pragma pack(push, 1)
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#define SMU8_MAX_CUS 2
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#define SMU8_PSMS_PER_CU 4
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#define SMU8_CACS_PER_CU 4
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struct SMU8_GfxCuPgScoreboard {
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uint8_t Enabled;
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uint8_t spare[3];
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};
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struct SMU8_Port80MonitorTable {
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uint32_t MmioAddress;
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uint32_t MemoryBaseHi;
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uint32_t MemoryBaseLo;
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uint16_t MemoryBufferSize;
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uint16_t MemoryPosition;
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uint16_t PollingInterval;
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uint8_t EnableCsrShadow;
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uint8_t EnableDramShadow;
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};
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/* Display specific power management parameters */
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#define PWRMGT_SEPARATION_TIME_SHIFT 0
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#define PWRMGT_SEPARATION_TIME_MASK 0xFFFF
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#define PWRMGT_DISABLE_CPU_CSTATES_SHIFT 16
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#define PWRMGT_DISABLE_CPU_CSTATES_MASK 0x1
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#define PWRMGT_DISABLE_CPU_PSTATES_SHIFT 24
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#define PWRMGT_DISABLE_CPU_PSTATES_MASK 0x1
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/* Clock Table Definitions */
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#define NUM_SCLK_LEVELS 8
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#define NUM_LCLK_LEVELS 8
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#define NUM_UVD_LEVELS 8
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#define NUM_ECLK_LEVELS 8
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#define NUM_ACLK_LEVELS 8
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struct SMU8_Fusion_ClkLevel {
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uint8_t GnbVid;
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uint8_t GfxVid;
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uint8_t DfsDid;
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uint8_t DeepSleepDid;
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uint32_t DfsBypass;
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uint32_t Frequency;
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};
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struct SMU8_Fusion_SclkBreakdownTable {
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struct SMU8_Fusion_ClkLevel ClkLevel[NUM_SCLK_LEVELS];
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struct SMU8_Fusion_ClkLevel DpmOffLevel;
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/* SMU8_Fusion_ClkLevel PwrOffLevel; */
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uint32_t SclkValidMask;
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uint32_t MaxSclkIndex;
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};
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struct SMU8_Fusion_LclkBreakdownTable {
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struct SMU8_Fusion_ClkLevel ClkLevel[NUM_LCLK_LEVELS];
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struct SMU8_Fusion_ClkLevel DpmOffLevel;
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/* SMU8_Fusion_ClkLevel PwrOffLevel; */
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uint32_t LclkValidMask;
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uint32_t MaxLclkIndex;
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};
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struct SMU8_Fusion_EclkBreakdownTable {
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struct SMU8_Fusion_ClkLevel ClkLevel[NUM_ECLK_LEVELS];
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struct SMU8_Fusion_ClkLevel DpmOffLevel;
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struct SMU8_Fusion_ClkLevel PwrOffLevel;
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uint32_t EclkValidMask;
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uint32_t MaxEclkIndex;
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};
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struct SMU8_Fusion_VclkBreakdownTable {
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struct SMU8_Fusion_ClkLevel ClkLevel[NUM_UVD_LEVELS];
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struct SMU8_Fusion_ClkLevel DpmOffLevel;
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struct SMU8_Fusion_ClkLevel PwrOffLevel;
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uint32_t VclkValidMask;
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uint32_t MaxVclkIndex;
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};
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struct SMU8_Fusion_DclkBreakdownTable {
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struct SMU8_Fusion_ClkLevel ClkLevel[NUM_UVD_LEVELS];
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struct SMU8_Fusion_ClkLevel DpmOffLevel;
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struct SMU8_Fusion_ClkLevel PwrOffLevel;
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uint32_t DclkValidMask;
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uint32_t MaxDclkIndex;
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};
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struct SMU8_Fusion_AclkBreakdownTable {
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struct SMU8_Fusion_ClkLevel ClkLevel[NUM_ACLK_LEVELS];
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struct SMU8_Fusion_ClkLevel DpmOffLevel;
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struct SMU8_Fusion_ClkLevel PwrOffLevel;
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uint32_t AclkValidMask;
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uint32_t MaxAclkIndex;
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};
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struct SMU8_Fusion_ClkTable {
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struct SMU8_Fusion_SclkBreakdownTable SclkBreakdownTable;
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struct SMU8_Fusion_LclkBreakdownTable LclkBreakdownTable;
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struct SMU8_Fusion_EclkBreakdownTable EclkBreakdownTable;
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struct SMU8_Fusion_VclkBreakdownTable VclkBreakdownTable;
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struct SMU8_Fusion_DclkBreakdownTable DclkBreakdownTable;
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struct SMU8_Fusion_AclkBreakdownTable AclkBreakdownTable;
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};
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#pragma pack(pop)
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#endif
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