560 lines
16 KiB
C
560 lines
16 KiB
C
/*
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* Copyright 2006 Dave Airlie <airlied@linux.ie>
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* Copyright © 2006-2007 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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*/
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc.h>
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#include "i915_drv.h"
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#include "i915_reg.h"
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#include "intel_connector.h"
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#include "intel_de.h"
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#include "intel_display_types.h"
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#include "intel_dvo.h"
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#include "intel_dvo_dev.h"
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#include "intel_dvo_regs.h"
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#include "intel_gmbus.h"
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#include "intel_panel.h"
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#define INTEL_DVO_CHIP_NONE 0
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#define INTEL_DVO_CHIP_LVDS 1
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#define INTEL_DVO_CHIP_TMDS 2
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#define INTEL_DVO_CHIP_TVOUT 4
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#define INTEL_DVO_CHIP_LVDS_NO_FIXED 5
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#define SIL164_ADDR 0x38
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#define CH7xxx_ADDR 0x76
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#define TFP410_ADDR 0x38
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#define NS2501_ADDR 0x38
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static const struct intel_dvo_device intel_dvo_devices[] = {
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{
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.type = INTEL_DVO_CHIP_TMDS,
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.name = "sil164",
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.port = PORT_C,
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.slave_addr = SIL164_ADDR,
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.dev_ops = &sil164_ops,
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},
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{
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.type = INTEL_DVO_CHIP_TMDS,
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.name = "ch7xxx",
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.port = PORT_C,
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.slave_addr = CH7xxx_ADDR,
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.dev_ops = &ch7xxx_ops,
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},
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{
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.type = INTEL_DVO_CHIP_TMDS,
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.name = "ch7xxx",
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.port = PORT_C,
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.slave_addr = 0x75, /* For some ch7010 */
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.dev_ops = &ch7xxx_ops,
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},
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{
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.type = INTEL_DVO_CHIP_LVDS,
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.name = "ivch",
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.port = PORT_A,
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.slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
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.dev_ops = &ivch_ops,
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},
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{
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.type = INTEL_DVO_CHIP_TMDS,
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.name = "tfp410",
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.port = PORT_C,
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.slave_addr = TFP410_ADDR,
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.dev_ops = &tfp410_ops,
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},
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{
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.type = INTEL_DVO_CHIP_LVDS,
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.name = "ch7017",
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.port = PORT_C,
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.slave_addr = 0x75,
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.gpio = GMBUS_PIN_DPB,
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.dev_ops = &ch7017_ops,
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},
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{
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.type = INTEL_DVO_CHIP_LVDS_NO_FIXED,
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.name = "ns2501",
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.port = PORT_B,
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.slave_addr = NS2501_ADDR,
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.dev_ops = &ns2501_ops,
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},
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};
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struct intel_dvo {
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struct intel_encoder base;
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struct intel_dvo_device dev;
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struct intel_connector *attached_connector;
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};
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static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
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{
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return container_of(encoder, struct intel_dvo, base);
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}
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static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector)
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{
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return enc_to_dvo(intel_attached_encoder(connector));
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}
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static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
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{
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struct drm_i915_private *i915 = to_i915(connector->base.dev);
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struct intel_encoder *encoder = intel_attached_encoder(connector);
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struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
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enum port port = encoder->port;
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u32 tmp;
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tmp = intel_de_read(i915, DVO(port));
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if (!(tmp & DVO_ENABLE))
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return false;
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return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
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}
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static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
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enum pipe *pipe)
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{
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struct drm_i915_private *i915 = to_i915(encoder->base.dev);
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enum port port = encoder->port;
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u32 tmp;
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tmp = intel_de_read(i915, DVO(port));
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*pipe = REG_FIELD_GET(DVO_PIPE_SEL_MASK, tmp);
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return tmp & DVO_ENABLE;
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}
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static void intel_dvo_get_config(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config)
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{
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struct drm_i915_private *i915 = to_i915(encoder->base.dev);
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enum port port = encoder->port;
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u32 tmp, flags = 0;
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pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
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tmp = intel_de_read(i915, DVO(port));
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if (tmp & DVO_HSYNC_ACTIVE_HIGH)
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flags |= DRM_MODE_FLAG_PHSYNC;
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else
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flags |= DRM_MODE_FLAG_NHSYNC;
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if (tmp & DVO_VSYNC_ACTIVE_HIGH)
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flags |= DRM_MODE_FLAG_PVSYNC;
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else
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flags |= DRM_MODE_FLAG_NVSYNC;
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pipe_config->hw.adjusted_mode.flags |= flags;
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pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock;
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}
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static void intel_disable_dvo(struct intel_atomic_state *state,
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struct intel_encoder *encoder,
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const struct intel_crtc_state *old_crtc_state,
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const struct drm_connector_state *old_conn_state)
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{
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struct drm_i915_private *i915 = to_i915(encoder->base.dev);
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struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
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enum port port = encoder->port;
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intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
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intel_de_rmw(i915, DVO(port), DVO_ENABLE, 0);
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intel_de_posting_read(i915, DVO(port));
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}
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static void intel_enable_dvo(struct intel_atomic_state *state,
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struct intel_encoder *encoder,
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const struct intel_crtc_state *pipe_config,
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const struct drm_connector_state *conn_state)
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{
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struct drm_i915_private *i915 = to_i915(encoder->base.dev);
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struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
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enum port port = encoder->port;
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intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
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&pipe_config->hw.mode,
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&pipe_config->hw.adjusted_mode);
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intel_de_rmw(i915, DVO(port), 0, DVO_ENABLE);
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intel_de_posting_read(i915, DVO(port));
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intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
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}
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static enum drm_mode_status
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intel_dvo_mode_valid(struct drm_connector *_connector,
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struct drm_display_mode *mode)
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{
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struct intel_connector *connector = to_intel_connector(_connector);
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struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
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const struct drm_display_mode *fixed_mode =
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intel_panel_fixed_mode(connector, mode);
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int max_dotclk = to_i915(connector->base.dev)->max_dotclk_freq;
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int target_clock = mode->clock;
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if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
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return MODE_NO_DBLESCAN;
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/* XXX: Validate clock range */
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if (fixed_mode) {
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enum drm_mode_status status;
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status = intel_panel_mode_valid(connector, mode);
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if (status != MODE_OK)
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return status;
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target_clock = fixed_mode->clock;
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}
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if (target_clock > max_dotclk)
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return MODE_CLOCK_HIGH;
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return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
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}
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static int intel_dvo_compute_config(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config,
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struct drm_connector_state *conn_state)
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{
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struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
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struct intel_connector *connector = to_intel_connector(conn_state->connector);
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struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
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const struct drm_display_mode *fixed_mode =
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intel_panel_fixed_mode(intel_dvo->attached_connector, adjusted_mode);
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/*
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* If we have timings from the BIOS for the panel, put them in
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* to the adjusted mode. The CRTC will be set up for this mode,
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* with the panel scaling set up to source from the H/VDisplay
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* of the original mode.
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*/
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if (fixed_mode) {
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int ret;
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ret = intel_panel_compute_config(connector, adjusted_mode);
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if (ret)
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return ret;
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}
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if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
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return -EINVAL;
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pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
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return 0;
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}
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static void intel_dvo_pre_enable(struct intel_atomic_state *state,
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struct intel_encoder *encoder,
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const struct intel_crtc_state *pipe_config,
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const struct drm_connector_state *conn_state)
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{
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struct drm_i915_private *i915 = to_i915(encoder->base.dev);
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struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
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const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
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enum port port = encoder->port;
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enum pipe pipe = crtc->pipe;
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u32 dvo_val;
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/* Save the active data order, since I don't know what it should be set to. */
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dvo_val = intel_de_read(i915, DVO(port)) &
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(DVO_DEDICATED_INT_ENABLE |
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DVO_PRESERVE_MASK | DVO_ACT_DATA_ORDER_MASK);
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dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
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DVO_BLANK_ACTIVE_HIGH;
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dvo_val |= DVO_PIPE_SEL(pipe);
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dvo_val |= DVO_PIPE_STALL;
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if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
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dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
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if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
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dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
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intel_de_write(i915, DVO_SRCDIM(port),
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DVO_SRCDIM_HORIZONTAL(adjusted_mode->crtc_hdisplay) |
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DVO_SRCDIM_VERTICAL(adjusted_mode->crtc_vdisplay));
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intel_de_write(i915, DVO(port), dvo_val);
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}
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static enum drm_connector_status
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intel_dvo_detect(struct drm_connector *_connector, bool force)
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{
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struct intel_connector *connector = to_intel_connector(_connector);
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struct drm_i915_private *i915 = to_i915(connector->base.dev);
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struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
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drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
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connector->base.base.id, connector->base.name);
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if (!INTEL_DISPLAY_ENABLED(i915))
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return connector_status_disconnected;
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return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
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}
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static int intel_dvo_get_modes(struct drm_connector *_connector)
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{
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struct intel_connector *connector = to_intel_connector(_connector);
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struct drm_i915_private *i915 = to_i915(connector->base.dev);
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int num_modes;
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/*
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* We should probably have an i2c driver get_modes function for those
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* devices which will have a fixed set of modes determined by the chip
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* (TV-out, for example), but for now with just TMDS and LVDS,
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* that's not the case.
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*/
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num_modes = intel_ddc_get_modes(&connector->base,
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intel_gmbus_get_adapter(i915, GMBUS_PIN_DPC));
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if (num_modes)
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return num_modes;
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return intel_panel_get_modes(connector);
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}
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static const struct drm_connector_funcs intel_dvo_connector_funcs = {
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.detect = intel_dvo_detect,
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.late_register = intel_connector_register,
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.early_unregister = intel_connector_unregister,
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.destroy = intel_connector_destroy,
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.fill_modes = drm_helper_probe_single_connector_modes,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
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};
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static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
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.mode_valid = intel_dvo_mode_valid,
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.get_modes = intel_dvo_get_modes,
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};
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static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
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{
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struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
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if (intel_dvo->dev.dev_ops->destroy)
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intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
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intel_encoder_destroy(encoder);
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}
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static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
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.destroy = intel_dvo_enc_destroy,
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};
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static int intel_dvo_encoder_type(const struct intel_dvo_device *dvo)
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{
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switch (dvo->type) {
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case INTEL_DVO_CHIP_TMDS:
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return DRM_MODE_ENCODER_TMDS;
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case INTEL_DVO_CHIP_LVDS_NO_FIXED:
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case INTEL_DVO_CHIP_LVDS:
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return DRM_MODE_ENCODER_LVDS;
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default:
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MISSING_CASE(dvo->type);
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return DRM_MODE_ENCODER_NONE;
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}
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}
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static int intel_dvo_connector_type(const struct intel_dvo_device *dvo)
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{
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switch (dvo->type) {
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case INTEL_DVO_CHIP_TMDS:
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return DRM_MODE_CONNECTOR_DVII;
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case INTEL_DVO_CHIP_LVDS_NO_FIXED:
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case INTEL_DVO_CHIP_LVDS:
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return DRM_MODE_CONNECTOR_LVDS;
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default:
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MISSING_CASE(dvo->type);
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return DRM_MODE_CONNECTOR_Unknown;
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}
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}
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static bool intel_dvo_init_dev(struct drm_i915_private *dev_priv,
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struct intel_dvo *intel_dvo,
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const struct intel_dvo_device *dvo)
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{
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struct i2c_adapter *i2c;
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u32 dpll[I915_MAX_PIPES];
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enum pipe pipe;
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int gpio;
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bool ret;
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/*
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* Allow the I2C driver info to specify the GPIO to be used in
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* special cases, but otherwise default to what's defined
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* in the spec.
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*/
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if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
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gpio = dvo->gpio;
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else if (dvo->type == INTEL_DVO_CHIP_LVDS)
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gpio = GMBUS_PIN_SSC;
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else
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gpio = GMBUS_PIN_DPB;
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/*
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* Set up the I2C bus necessary for the chip we're probing.
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* It appears that everything is on GPIOE except for panels
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* on i830 laptops, which are on GPIOB (DVOA).
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*/
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i2c = intel_gmbus_get_adapter(dev_priv, gpio);
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intel_dvo->dev = *dvo;
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/*
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* GMBUS NAK handling seems to be unstable, hence let the
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* transmitter detection run in bit banging mode for now.
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*/
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intel_gmbus_force_bit(i2c, true);
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/*
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* ns2501 requires the DVO 2x clock before it will
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* respond to i2c accesses, so make sure we have
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* the clock enabled before we attempt to initialize
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* the device.
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*/
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for_each_pipe(dev_priv, pipe) {
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dpll[pipe] = intel_de_read(dev_priv, DPLL(pipe));
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intel_de_write(dev_priv, DPLL(pipe),
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dpll[pipe] | DPLL_DVO_2X_MODE);
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}
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ret = dvo->dev_ops->init(&intel_dvo->dev, i2c);
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/* restore the DVO 2x clock state to original */
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for_each_pipe(dev_priv, pipe) {
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intel_de_write(dev_priv, DPLL(pipe), dpll[pipe]);
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}
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intel_gmbus_force_bit(i2c, false);
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return ret;
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}
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static bool intel_dvo_probe(struct drm_i915_private *i915,
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struct intel_dvo *intel_dvo)
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{
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int i;
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/* Now, try to find a controller */
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for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
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if (intel_dvo_init_dev(i915, intel_dvo,
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&intel_dvo_devices[i]))
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return true;
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}
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return false;
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}
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void intel_dvo_init(struct drm_i915_private *i915)
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{
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struct intel_connector *connector;
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struct intel_encoder *encoder;
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struct intel_dvo *intel_dvo;
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|
|
intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
|
|
if (!intel_dvo)
|
|
return;
|
|
|
|
connector = intel_connector_alloc();
|
|
if (!connector) {
|
|
kfree(intel_dvo);
|
|
return;
|
|
}
|
|
|
|
intel_dvo->attached_connector = connector;
|
|
|
|
encoder = &intel_dvo->base;
|
|
|
|
encoder->disable = intel_disable_dvo;
|
|
encoder->enable = intel_enable_dvo;
|
|
encoder->get_hw_state = intel_dvo_get_hw_state;
|
|
encoder->get_config = intel_dvo_get_config;
|
|
encoder->compute_config = intel_dvo_compute_config;
|
|
encoder->pre_enable = intel_dvo_pre_enable;
|
|
connector->get_hw_state = intel_dvo_connector_get_hw_state;
|
|
|
|
if (!intel_dvo_probe(i915, intel_dvo)) {
|
|
kfree(intel_dvo);
|
|
intel_connector_free(connector);
|
|
return;
|
|
}
|
|
|
|
encoder->type = INTEL_OUTPUT_DVO;
|
|
encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
|
|
encoder->port = intel_dvo->dev.port;
|
|
encoder->pipe_mask = ~0;
|
|
|
|
if (intel_dvo->dev.type != INTEL_DVO_CHIP_LVDS)
|
|
encoder->cloneable = BIT(INTEL_OUTPUT_ANALOG) |
|
|
BIT(INTEL_OUTPUT_DVO);
|
|
|
|
drm_encoder_init(&i915->drm, &encoder->base,
|
|
&intel_dvo_enc_funcs,
|
|
intel_dvo_encoder_type(&intel_dvo->dev),
|
|
"DVO %c", port_name(encoder->port));
|
|
|
|
drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] detected %s\n",
|
|
encoder->base.base.id, encoder->base.name,
|
|
intel_dvo->dev.name);
|
|
|
|
if (intel_dvo->dev.type == INTEL_DVO_CHIP_TMDS)
|
|
connector->polled = DRM_CONNECTOR_POLL_CONNECT |
|
|
DRM_CONNECTOR_POLL_DISCONNECT;
|
|
|
|
drm_connector_init(&i915->drm, &connector->base,
|
|
&intel_dvo_connector_funcs,
|
|
intel_dvo_connector_type(&intel_dvo->dev));
|
|
|
|
drm_connector_helper_add(&connector->base,
|
|
&intel_dvo_connector_helper_funcs);
|
|
connector->base.display_info.subpixel_order = SubPixelHorizontalRGB;
|
|
|
|
intel_connector_attach_encoder(connector, encoder);
|
|
|
|
if (intel_dvo->dev.type == INTEL_DVO_CHIP_LVDS) {
|
|
/*
|
|
* For our LVDS chipsets, we should hopefully be able
|
|
* to dig the fixed panel mode out of the BIOS data.
|
|
* However, it's in a different format from the BIOS
|
|
* data on chipsets with integrated LVDS (stored in AIM
|
|
* headers, likely), so for now, just get the current
|
|
* mode being output through DVO.
|
|
*/
|
|
intel_panel_add_encoder_fixed_mode(connector, encoder);
|
|
|
|
intel_panel_init(connector, NULL);
|
|
}
|
|
}
|