324 lines
8.1 KiB
C
324 lines
8.1 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2021 Intel Corporation
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*/
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#include "gem/i915_gem_region.h"
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#include "i915_drv.h"
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#include "intel_atomic_plane.h"
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#include "intel_display.h"
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#include "intel_display_types.h"
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#include "intel_fb.h"
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#include "intel_plane_initial.h"
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static bool
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intel_reuse_initial_plane_obj(struct drm_i915_private *i915,
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const struct intel_initial_plane_config *plane_config,
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struct drm_framebuffer **fb,
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struct i915_vma **vma)
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{
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struct intel_crtc *crtc;
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for_each_intel_crtc(&i915->drm, crtc) {
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struct intel_crtc_state *crtc_state =
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to_intel_crtc_state(crtc->base.state);
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struct intel_plane *plane =
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to_intel_plane(crtc->base.primary);
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struct intel_plane_state *plane_state =
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to_intel_plane_state(plane->base.state);
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if (!crtc_state->uapi.active)
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continue;
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if (!plane_state->ggtt_vma)
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continue;
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if (intel_plane_ggtt_offset(plane_state) == plane_config->base) {
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*fb = plane_state->hw.fb;
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*vma = plane_state->ggtt_vma;
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return true;
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}
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}
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return false;
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}
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static struct i915_vma *
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initial_plane_vma(struct drm_i915_private *i915,
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struct intel_initial_plane_config *plane_config)
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{
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struct intel_memory_region *mem;
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struct drm_i915_gem_object *obj;
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struct i915_vma *vma;
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resource_size_t phys_base;
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u32 base, size;
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u64 pinctl;
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if (plane_config->size == 0)
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return NULL;
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base = round_down(plane_config->base, I915_GTT_MIN_ALIGNMENT);
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if (IS_DGFX(i915)) {
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gen8_pte_t __iomem *gte = to_gt(i915)->ggtt->gsm;
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gen8_pte_t pte;
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gte += base / I915_GTT_PAGE_SIZE;
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pte = ioread64(gte);
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if (!(pte & GEN12_GGTT_PTE_LM)) {
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drm_err(&i915->drm,
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"Initial plane programming missing PTE_LM bit\n");
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return NULL;
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}
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phys_base = pte & I915_GTT_PAGE_MASK;
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mem = i915->mm.regions[INTEL_REGION_LMEM_0];
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/*
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* We don't currently expect this to ever be placed in the
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* stolen portion.
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*/
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if (phys_base >= resource_size(&mem->region)) {
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drm_err(&i915->drm,
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"Initial plane programming using invalid range, phys_base=%pa\n",
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&phys_base);
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return NULL;
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}
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drm_dbg(&i915->drm,
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"Using phys_base=%pa, based on initial plane programming\n",
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&phys_base);
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} else {
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phys_base = base;
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mem = i915->mm.stolen_region;
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}
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if (!mem)
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return NULL;
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size = round_up(plane_config->base + plane_config->size,
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mem->min_page_size);
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size -= base;
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/*
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* If the FB is too big, just don't use it since fbdev is not very
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* important and we should probably use that space with FBC or other
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* features.
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*/
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if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
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mem == i915->mm.stolen_region &&
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size * 2 > i915->dsm.usable_size)
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return NULL;
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obj = i915_gem_object_create_region_at(mem, phys_base, size, 0);
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if (IS_ERR(obj))
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return NULL;
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/*
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* Mark it WT ahead of time to avoid changing the
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* cache_level during fbdev initialization. The
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* unbind there would get stuck waiting for rcu.
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*/
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i915_gem_object_set_cache_coherency(obj, HAS_WT(i915) ?
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I915_CACHE_WT : I915_CACHE_NONE);
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switch (plane_config->tiling) {
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case I915_TILING_NONE:
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break;
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case I915_TILING_X:
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case I915_TILING_Y:
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obj->tiling_and_stride =
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plane_config->fb->base.pitches[0] |
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plane_config->tiling;
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break;
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default:
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MISSING_CASE(plane_config->tiling);
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goto err_obj;
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}
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vma = i915_vma_instance(obj, &to_gt(i915)->ggtt->vm, NULL);
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if (IS_ERR(vma))
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goto err_obj;
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pinctl = PIN_GLOBAL | PIN_OFFSET_FIXED | base;
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if (HAS_GMCH(i915))
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pinctl |= PIN_MAPPABLE;
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if (i915_vma_pin(vma, 0, 0, pinctl))
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goto err_obj;
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if (i915_gem_object_is_tiled(obj) &&
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!i915_vma_is_map_and_fenceable(vma))
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goto err_obj;
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return vma;
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err_obj:
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i915_gem_object_put(obj);
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return NULL;
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}
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static bool
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intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
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struct intel_initial_plane_config *plane_config)
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{
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struct drm_device *dev = crtc->base.dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct drm_mode_fb_cmd2 mode_cmd = { 0 };
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struct drm_framebuffer *fb = &plane_config->fb->base;
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struct i915_vma *vma;
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switch (fb->modifier) {
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case DRM_FORMAT_MOD_LINEAR:
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case I915_FORMAT_MOD_X_TILED:
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case I915_FORMAT_MOD_Y_TILED:
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case I915_FORMAT_MOD_4_TILED:
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break;
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default:
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drm_dbg(&dev_priv->drm,
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"Unsupported modifier for initial FB: 0x%llx\n",
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fb->modifier);
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return false;
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}
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vma = initial_plane_vma(dev_priv, plane_config);
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if (!vma)
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return false;
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mode_cmd.pixel_format = fb->format->format;
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mode_cmd.width = fb->width;
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mode_cmd.height = fb->height;
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mode_cmd.pitches[0] = fb->pitches[0];
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mode_cmd.modifier[0] = fb->modifier;
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mode_cmd.flags = DRM_MODE_FB_MODIFIERS;
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if (intel_framebuffer_init(to_intel_framebuffer(fb),
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vma->obj, &mode_cmd)) {
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drm_dbg_kms(&dev_priv->drm, "intel fb init failed\n");
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goto err_vma;
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}
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plane_config->vma = vma;
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return true;
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err_vma:
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i915_vma_put(vma);
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return false;
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}
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static void
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intel_find_initial_plane_obj(struct intel_crtc *crtc,
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struct intel_initial_plane_config *plane_config)
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{
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struct drm_device *dev = crtc->base.dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct intel_plane *plane =
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to_intel_plane(crtc->base.primary);
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struct intel_plane_state *plane_state =
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to_intel_plane_state(plane->base.state);
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struct drm_framebuffer *fb;
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struct i915_vma *vma;
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/*
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* TODO:
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* Disable planes if get_initial_plane_config() failed.
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* Make sure things work if the surface base is not page aligned.
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*/
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if (!plane_config->fb)
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return;
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if (intel_alloc_initial_plane_obj(crtc, plane_config)) {
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fb = &plane_config->fb->base;
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vma = plane_config->vma;
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goto valid_fb;
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}
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/*
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* Failed to alloc the obj, check to see if we should share
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* an fb with another CRTC instead
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*/
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if (intel_reuse_initial_plane_obj(dev_priv, plane_config, &fb, &vma))
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goto valid_fb;
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/*
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* We've failed to reconstruct the BIOS FB. Current display state
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* indicates that the primary plane is visible, but has a NULL FB,
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* which will lead to problems later if we don't fix it up. The
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* simplest solution is to just disable the primary plane now and
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* pretend the BIOS never had it enabled.
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*/
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intel_plane_disable_noatomic(crtc, plane);
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return;
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valid_fb:
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plane_state->uapi.rotation = plane_config->rotation;
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intel_fb_fill_view(to_intel_framebuffer(fb),
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plane_state->uapi.rotation, &plane_state->view);
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__i915_vma_pin(vma);
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plane_state->ggtt_vma = i915_vma_get(vma);
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if (intel_plane_uses_fence(plane_state) &&
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i915_vma_pin_fence(vma) == 0 && vma->fence)
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plane_state->flags |= PLANE_HAS_FENCE;
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plane_state->uapi.src_x = 0;
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plane_state->uapi.src_y = 0;
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plane_state->uapi.src_w = fb->width << 16;
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plane_state->uapi.src_h = fb->height << 16;
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plane_state->uapi.crtc_x = 0;
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plane_state->uapi.crtc_y = 0;
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plane_state->uapi.crtc_w = fb->width;
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plane_state->uapi.crtc_h = fb->height;
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if (plane_config->tiling)
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dev_priv->preserve_bios_swizzle = true;
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plane_state->uapi.fb = fb;
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drm_framebuffer_get(fb);
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plane_state->uapi.crtc = &crtc->base;
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intel_plane_copy_uapi_to_hw_state(plane_state, plane_state, crtc);
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atomic_or(plane->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits);
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}
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static void plane_config_fini(struct intel_initial_plane_config *plane_config)
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{
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if (plane_config->fb) {
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struct drm_framebuffer *fb = &plane_config->fb->base;
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/* We may only have the stub and not a full framebuffer */
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if (drm_framebuffer_read_refcount(fb))
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drm_framebuffer_put(fb);
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else
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kfree(fb);
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}
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if (plane_config->vma)
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i915_vma_put(plane_config->vma);
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}
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void intel_crtc_initial_plane_config(struct intel_crtc *crtc)
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{
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct intel_initial_plane_config plane_config = {};
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/*
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* Note that reserving the BIOS fb up front prevents us
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* from stuffing other stolen allocations like the ring
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* on top. This prevents some ugliness at boot time, and
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* can even allow for smooth boot transitions if the BIOS
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* fb is large enough for the active pipe configuration.
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*/
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dev_priv->display.funcs.display->get_initial_plane_config(crtc, &plane_config);
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/*
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* If the fb is shared between multiple heads, we'll
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* just get the first one.
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*/
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intel_find_initial_plane_obj(crtc, &plane_config);
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plane_config_fini(&plane_config);
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}
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