510 lines
11 KiB
C
510 lines
11 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2021 Intel Corporation
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*/
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#define NUM_STEPS 5
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#define H2G_DELAY 50000
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#define delay_for_h2g() usleep_range(H2G_DELAY, H2G_DELAY + 10000)
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#define FREQUENCY_REQ_UNIT DIV_ROUND_CLOSEST(GT_FREQUENCY_MULTIPLIER, \
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GEN9_FREQ_SCALER)
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enum test_type {
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VARY_MIN,
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VARY_MAX,
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MAX_GRANTED,
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SLPC_POWER,
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TILE_INTERACTION,
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};
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struct slpc_thread {
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struct kthread_worker *worker;
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struct kthread_work work;
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struct intel_gt *gt;
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int result;
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};
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static int slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 freq)
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{
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int ret;
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ret = intel_guc_slpc_set_min_freq(slpc, freq);
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if (ret)
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pr_err("Could not set min frequency to [%u]\n", freq);
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else /* Delay to ensure h2g completes */
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delay_for_h2g();
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return ret;
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}
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static int slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 freq)
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{
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int ret;
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ret = intel_guc_slpc_set_max_freq(slpc, freq);
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if (ret)
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pr_err("Could not set maximum frequency [%u]\n",
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freq);
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else /* Delay to ensure h2g completes */
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delay_for_h2g();
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return ret;
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}
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static int slpc_set_freq(struct intel_gt *gt, u32 freq)
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{
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int err;
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struct intel_guc_slpc *slpc = >->uc.guc.slpc;
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err = slpc_set_max_freq(slpc, freq);
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if (err) {
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pr_err("Unable to update max freq");
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return err;
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}
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err = slpc_set_min_freq(slpc, freq);
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if (err) {
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pr_err("Unable to update min freq");
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return err;
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}
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return err;
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}
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static u64 measure_power_at_freq(struct intel_gt *gt, int *freq, u64 *power)
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{
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int err = 0;
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err = slpc_set_freq(gt, *freq);
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if (err)
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return err;
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*freq = intel_rps_read_actual_frequency(>->rps);
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*power = measure_power(>->rps, freq);
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return err;
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}
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static int vary_max_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
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u32 *max_act_freq)
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{
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u32 step, max_freq, req_freq;
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u32 act_freq;
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int err = 0;
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/* Go from max to min in 5 steps */
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step = (slpc->rp0_freq - slpc->min_freq) / NUM_STEPS;
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*max_act_freq = slpc->min_freq;
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for (max_freq = slpc->rp0_freq; max_freq > slpc->min_freq;
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max_freq -= step) {
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err = slpc_set_max_freq(slpc, max_freq);
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if (err)
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break;
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req_freq = intel_rps_read_punit_req_frequency(rps);
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/* GuC requests freq in multiples of 50/3 MHz */
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if (req_freq > (max_freq + FREQUENCY_REQ_UNIT)) {
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pr_err("SWReq is %d, should be at most %d\n", req_freq,
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max_freq + FREQUENCY_REQ_UNIT);
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err = -EINVAL;
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}
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act_freq = intel_rps_read_actual_frequency(rps);
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if (act_freq > *max_act_freq)
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*max_act_freq = act_freq;
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if (err)
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break;
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}
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return err;
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}
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static int vary_min_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
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u32 *max_act_freq)
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{
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u32 step, min_freq, req_freq;
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u32 act_freq;
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int err = 0;
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/* Go from min to max in 5 steps */
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step = (slpc->rp0_freq - slpc->min_freq) / NUM_STEPS;
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*max_act_freq = slpc->min_freq;
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for (min_freq = slpc->min_freq; min_freq < slpc->rp0_freq;
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min_freq += step) {
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err = slpc_set_min_freq(slpc, min_freq);
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if (err)
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break;
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req_freq = intel_rps_read_punit_req_frequency(rps);
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/* GuC requests freq in multiples of 50/3 MHz */
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if (req_freq < (min_freq - FREQUENCY_REQ_UNIT)) {
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pr_err("SWReq is %d, should be at least %d\n", req_freq,
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min_freq - FREQUENCY_REQ_UNIT);
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err = -EINVAL;
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}
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act_freq = intel_rps_read_actual_frequency(rps);
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if (act_freq > *max_act_freq)
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*max_act_freq = act_freq;
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if (err)
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break;
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}
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return err;
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}
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static int slpc_power(struct intel_gt *gt, struct intel_engine_cs *engine)
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{
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struct intel_guc_slpc *slpc = >->uc.guc.slpc;
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struct {
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u64 power;
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int freq;
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} min, max;
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int err = 0;
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/*
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* Our fundamental assumption is that running at lower frequency
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* actually saves power. Let's see if our RAPL measurement supports
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* that theory.
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*/
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if (!librapl_supported(gt->i915))
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return 0;
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min.freq = slpc->min_freq;
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err = measure_power_at_freq(gt, &min.freq, &min.power);
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if (err)
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return err;
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max.freq = slpc->rp0_freq;
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err = measure_power_at_freq(gt, &max.freq, &max.power);
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if (err)
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return err;
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pr_info("%s: min:%llumW @ %uMHz, max:%llumW @ %uMHz\n",
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engine->name,
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min.power, min.freq,
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max.power, max.freq);
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if (10 * min.freq >= 9 * max.freq) {
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pr_notice("Could not control frequency, ran at [%uMHz, %uMhz]\n",
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min.freq, max.freq);
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}
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if (11 * min.power > 10 * max.power) {
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pr_err("%s: did not conserve power when setting lower frequency!\n",
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engine->name);
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err = -EINVAL;
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}
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/* Restore min/max frequencies */
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slpc_set_max_freq(slpc, slpc->rp0_freq);
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slpc_set_min_freq(slpc, slpc->min_freq);
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return err;
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}
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static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps, u32 *max_act_freq)
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{
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struct intel_gt *gt = rps_to_gt(rps);
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u32 perf_limit_reasons;
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int err = 0;
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err = slpc_set_min_freq(slpc, slpc->rp0_freq);
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if (err)
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return err;
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*max_act_freq = intel_rps_read_actual_frequency(rps);
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if (*max_act_freq != slpc->rp0_freq) {
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/* Check if there was some throttling by pcode */
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perf_limit_reasons = intel_uncore_read(gt->uncore,
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intel_gt_perf_limit_reasons_reg(gt));
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/* If not, this is an error */
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if (!(perf_limit_reasons & GT0_PERF_LIMIT_REASONS_MASK)) {
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pr_err("Pcode did not grant max freq\n");
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err = -EINVAL;
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} else {
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pr_info("Pcode throttled frequency 0x%x\n", perf_limit_reasons);
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}
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}
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return err;
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}
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static int run_test(struct intel_gt *gt, int test_type)
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{
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struct intel_guc_slpc *slpc = >->uc.guc.slpc;
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struct intel_rps *rps = >->rps;
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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struct igt_spinner spin;
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u32 slpc_min_freq, slpc_max_freq;
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int err = 0;
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if (!intel_uc_uses_guc_slpc(>->uc))
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return 0;
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if (slpc->min_freq == slpc->rp0_freq) {
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pr_err("Min/Max are fused to the same value\n");
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return -EINVAL;
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}
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if (igt_spinner_init(&spin, gt))
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return -ENOMEM;
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if (intel_guc_slpc_get_max_freq(slpc, &slpc_max_freq)) {
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pr_err("Could not get SLPC max freq\n");
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return -EIO;
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}
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if (intel_guc_slpc_get_min_freq(slpc, &slpc_min_freq)) {
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pr_err("Could not get SLPC min freq\n");
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return -EIO;
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}
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/*
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* Set min frequency to RPn so that we can test the whole
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* range of RPn-RP0. This also turns off efficient freq
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* usage and makes results more predictable.
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*/
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err = slpc_set_min_freq(slpc, slpc->min_freq);
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if (err) {
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pr_err("Unable to update min freq!");
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return err;
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}
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intel_gt_pm_wait_for_idle(gt);
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intel_gt_pm_get(gt);
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for_each_engine(engine, gt, id) {
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struct i915_request *rq;
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u32 max_act_freq;
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if (!intel_engine_can_store_dword(engine))
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continue;
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st_engine_heartbeat_disable(engine);
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rq = igt_spinner_create_request(&spin,
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engine->kernel_context,
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MI_NOOP);
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if (IS_ERR(rq)) {
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err = PTR_ERR(rq);
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st_engine_heartbeat_enable(engine);
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break;
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}
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i915_request_add(rq);
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if (!igt_wait_for_spinner(&spin, rq)) {
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pr_err("%s: Spinner did not start\n",
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engine->name);
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igt_spinner_end(&spin);
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st_engine_heartbeat_enable(engine);
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intel_gt_set_wedged(engine->gt);
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err = -EIO;
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break;
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}
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switch (test_type) {
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case VARY_MIN:
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err = vary_min_freq(slpc, rps, &max_act_freq);
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break;
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case VARY_MAX:
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err = vary_max_freq(slpc, rps, &max_act_freq);
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break;
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case MAX_GRANTED:
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case TILE_INTERACTION:
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/* Media engines have a different RP0 */
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if (gt->type != GT_MEDIA && (engine->class == VIDEO_DECODE_CLASS ||
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engine->class == VIDEO_ENHANCEMENT_CLASS)) {
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igt_spinner_end(&spin);
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st_engine_heartbeat_enable(engine);
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err = 0;
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continue;
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}
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err = max_granted_freq(slpc, rps, &max_act_freq);
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break;
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case SLPC_POWER:
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err = slpc_power(gt, engine);
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break;
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}
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if (test_type != SLPC_POWER) {
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pr_info("Max actual frequency for %s was %d\n",
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engine->name, max_act_freq);
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/* Actual frequency should rise above min */
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if (max_act_freq <= slpc->min_freq) {
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pr_err("Actual freq did not rise above min\n");
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pr_err("Perf Limit Reasons: 0x%x\n",
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intel_uncore_read(gt->uncore,
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intel_gt_perf_limit_reasons_reg(gt)));
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err = -EINVAL;
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}
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}
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igt_spinner_end(&spin);
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st_engine_heartbeat_enable(engine);
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if (err)
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break;
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}
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/* Restore min/max frequencies */
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slpc_set_max_freq(slpc, slpc_max_freq);
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slpc_set_min_freq(slpc, slpc_min_freq);
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if (igt_flush_test(gt->i915))
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err = -EIO;
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intel_gt_pm_put(gt);
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igt_spinner_fini(&spin);
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intel_gt_pm_wait_for_idle(gt);
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return err;
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}
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static int live_slpc_vary_min(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct intel_gt *gt;
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unsigned int i;
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int ret;
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for_each_gt(gt, i915, i) {
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ret = run_test(gt, VARY_MIN);
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if (ret)
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return ret;
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}
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return ret;
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}
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static int live_slpc_vary_max(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct intel_gt *gt;
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unsigned int i;
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int ret;
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for_each_gt(gt, i915, i) {
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ret = run_test(gt, VARY_MAX);
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if (ret)
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return ret;
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}
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return ret;
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}
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/* check if pcode can grant RP0 */
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static int live_slpc_max_granted(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct intel_gt *gt;
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unsigned int i;
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int ret;
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for_each_gt(gt, i915, i) {
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ret = run_test(gt, MAX_GRANTED);
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if (ret)
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return ret;
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}
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return ret;
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}
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static int live_slpc_power(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct intel_gt *gt;
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unsigned int i;
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int ret;
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for_each_gt(gt, i915, i) {
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ret = run_test(gt, SLPC_POWER);
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if (ret)
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return ret;
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}
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return ret;
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}
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static void slpc_spinner_thread(struct kthread_work *work)
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{
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struct slpc_thread *thread = container_of(work, typeof(*thread), work);
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thread->result = run_test(thread->gt, TILE_INTERACTION);
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}
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static int live_slpc_tile_interaction(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct intel_gt *gt;
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struct slpc_thread *threads;
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int i = 0, ret = 0;
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threads = kcalloc(I915_MAX_GT, sizeof(*threads), GFP_KERNEL);
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if (!threads)
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return -ENOMEM;
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for_each_gt(gt, i915, i) {
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threads[i].worker = kthread_create_worker(0, "igt/slpc_parallel:%d", gt->info.id);
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if (IS_ERR(threads[i].worker)) {
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ret = PTR_ERR(threads[i].worker);
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break;
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}
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threads[i].gt = gt;
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kthread_init_work(&threads[i].work, slpc_spinner_thread);
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kthread_queue_work(threads[i].worker, &threads[i].work);
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}
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for_each_gt(gt, i915, i) {
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int status;
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if (IS_ERR_OR_NULL(threads[i].worker))
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continue;
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kthread_flush_work(&threads[i].work);
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status = READ_ONCE(threads[i].result);
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if (status && !ret) {
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pr_err("%s GT %d failed ", __func__, gt->info.id);
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ret = status;
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}
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kthread_destroy_worker(threads[i].worker);
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}
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kfree(threads);
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return ret;
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}
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int intel_slpc_live_selftests(struct drm_i915_private *i915)
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{
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static const struct i915_subtest tests[] = {
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SUBTEST(live_slpc_vary_max),
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SUBTEST(live_slpc_vary_min),
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SUBTEST(live_slpc_max_granted),
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SUBTEST(live_slpc_power),
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SUBTEST(live_slpc_tile_interaction),
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};
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struct intel_gt *gt;
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unsigned int i;
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for_each_gt(gt, i915, i) {
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if (intel_gt_is_wedged(gt))
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return 0;
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}
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return i915_live_subtests(tests, i915);
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}
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