631 lines
16 KiB
C
631 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019-2022 Bootlin
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* Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
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*/
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#include <linux/of.h>
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#include <linux/types.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_blend.h>
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#include <drm/drm_fb_dma_helper.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_framebuffer.h>
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#include <drm/drm_plane.h>
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#include <drm/drm_print.h>
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#include "logicvc_crtc.h"
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#include "logicvc_drm.h"
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#include "logicvc_layer.h"
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#include "logicvc_of.h"
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#include "logicvc_regs.h"
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#define logicvc_layer(p) \
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container_of(p, struct logicvc_layer, drm_plane)
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static uint32_t logicvc_layer_formats_rgb16[] = {
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DRM_FORMAT_RGB565,
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DRM_FORMAT_BGR565,
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DRM_FORMAT_INVALID,
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};
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static uint32_t logicvc_layer_formats_rgb24[] = {
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_XBGR8888,
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DRM_FORMAT_INVALID,
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};
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/*
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* What we call depth in this driver only counts color components, not alpha.
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* This allows us to stay compatible with the LogiCVC bistream definitions.
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*/
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static uint32_t logicvc_layer_formats_rgb24_alpha[] = {
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_ABGR8888,
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DRM_FORMAT_INVALID,
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};
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static struct logicvc_layer_formats logicvc_layer_formats[] = {
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{
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.colorspace = LOGICVC_LAYER_COLORSPACE_RGB,
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.depth = 16,
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.formats = logicvc_layer_formats_rgb16,
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},
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{
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.colorspace = LOGICVC_LAYER_COLORSPACE_RGB,
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.depth = 24,
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.formats = logicvc_layer_formats_rgb24,
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},
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{
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.colorspace = LOGICVC_LAYER_COLORSPACE_RGB,
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.depth = 24,
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.alpha = true,
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.formats = logicvc_layer_formats_rgb24_alpha,
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},
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{ }
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};
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static bool logicvc_layer_format_inverted(uint32_t format)
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{
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switch (format) {
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case DRM_FORMAT_BGR565:
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case DRM_FORMAT_BGR888:
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case DRM_FORMAT_XBGR8888:
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case DRM_FORMAT_ABGR8888:
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return true;
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default:
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return false;
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}
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}
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static int logicvc_plane_atomic_check(struct drm_plane *drm_plane,
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struct drm_atomic_state *state)
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{
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struct drm_device *drm_dev = drm_plane->dev;
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struct logicvc_layer *layer = logicvc_layer(drm_plane);
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struct logicvc_drm *logicvc = logicvc_drm(drm_dev);
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struct drm_plane_state *new_state =
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drm_atomic_get_new_plane_state(state, drm_plane);
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struct drm_crtc_state *crtc_state;
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int min_scale, max_scale;
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bool can_position;
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int ret;
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if (!new_state->crtc)
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return 0;
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crtc_state = drm_atomic_get_existing_crtc_state(new_state->state,
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new_state->crtc);
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if (WARN_ON(!crtc_state))
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return -EINVAL;
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if (new_state->crtc_x < 0 || new_state->crtc_y < 0) {
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drm_err(drm_dev,
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"Negative on-CRTC positions are not supported.\n");
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return -EINVAL;
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}
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if (!logicvc->caps->layer_address) {
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ret = logicvc_layer_buffer_find_setup(logicvc, layer, new_state,
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NULL);
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if (ret) {
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drm_err(drm_dev, "No viable setup for buffer found.\n");
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return ret;
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}
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}
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min_scale = DRM_PLANE_NO_SCALING;
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max_scale = DRM_PLANE_NO_SCALING;
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can_position = (drm_plane->type == DRM_PLANE_TYPE_OVERLAY &&
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layer->index != (logicvc->config.layers_count - 1) &&
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logicvc->config.layers_configurable);
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ret = drm_atomic_helper_check_plane_state(new_state, crtc_state,
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min_scale, max_scale,
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can_position, true);
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if (ret) {
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drm_err(drm_dev, "Invalid plane state\n\n");
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return ret;
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}
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return 0;
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}
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static void logicvc_plane_atomic_update(struct drm_plane *drm_plane,
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struct drm_atomic_state *state)
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{
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struct logicvc_layer *layer = logicvc_layer(drm_plane);
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struct logicvc_drm *logicvc = logicvc_drm(drm_plane->dev);
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struct drm_device *drm_dev = &logicvc->drm_dev;
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struct drm_plane_state *new_state =
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drm_atomic_get_new_plane_state(state, drm_plane);
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struct drm_crtc *drm_crtc = &logicvc->crtc->drm_crtc;
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struct drm_display_mode *mode = &drm_crtc->state->adjusted_mode;
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struct drm_framebuffer *fb = new_state->fb;
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struct logicvc_layer_buffer_setup setup = {};
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u32 index = layer->index;
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u32 reg;
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/* Layer dimensions */
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regmap_write(logicvc->regmap, LOGICVC_LAYER_WIDTH_REG(index),
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new_state->crtc_w - 1);
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regmap_write(logicvc->regmap, LOGICVC_LAYER_HEIGHT_REG(index),
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new_state->crtc_h - 1);
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if (logicvc->caps->layer_address) {
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phys_addr_t fb_addr = drm_fb_dma_get_gem_addr(fb, new_state, 0);
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regmap_write(logicvc->regmap, LOGICVC_LAYER_ADDRESS_REG(index),
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fb_addr);
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} else {
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/* Rely on offsets to configure the address. */
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logicvc_layer_buffer_find_setup(logicvc, layer, new_state,
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&setup);
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/* Layer memory offsets */
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regmap_write(logicvc->regmap, LOGICVC_BUFFER_SEL_REG,
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LOGICVC_BUFFER_SEL_VALUE(index, setup.buffer_sel));
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regmap_write(logicvc->regmap, LOGICVC_LAYER_HOFFSET_REG(index),
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setup.hoffset);
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regmap_write(logicvc->regmap, LOGICVC_LAYER_VOFFSET_REG(index),
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setup.voffset);
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}
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/* Layer position */
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regmap_write(logicvc->regmap, LOGICVC_LAYER_HPOSITION_REG(index),
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mode->hdisplay - 1 - new_state->crtc_x);
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/* Vertical position must be set last to sync layer register changes. */
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regmap_write(logicvc->regmap, LOGICVC_LAYER_VPOSITION_REG(index),
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mode->vdisplay - 1 - new_state->crtc_y);
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/* Layer alpha */
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if (layer->config.alpha_mode == LOGICVC_LAYER_ALPHA_LAYER) {
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u32 alpha_bits;
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u32 alpha_max;
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u32 alpha;
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switch (layer->config.depth) {
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case 8:
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alpha_bits = 3;
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break;
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case 16:
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if (layer->config.colorspace ==
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LOGICVC_LAYER_COLORSPACE_YUV)
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alpha_bits = 8;
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else
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alpha_bits = 6;
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break;
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default:
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alpha_bits = 8;
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break;
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}
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alpha_max = BIT(alpha_bits) - 1;
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alpha = new_state->alpha * alpha_max / DRM_BLEND_ALPHA_OPAQUE;
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drm_dbg_kms(drm_dev, "Setting layer %d alpha to %d/%d\n", index,
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alpha, alpha_max);
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regmap_write(logicvc->regmap, LOGICVC_LAYER_ALPHA_REG(index),
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alpha);
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}
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/* Layer control */
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reg = LOGICVC_LAYER_CTRL_ENABLE;
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if (logicvc_layer_format_inverted(fb->format->format))
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reg |= LOGICVC_LAYER_CTRL_PIXEL_FORMAT_INVERT;
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reg |= LOGICVC_LAYER_CTRL_COLOR_KEY_DISABLE;
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regmap_write(logicvc->regmap, LOGICVC_LAYER_CTRL_REG(index), reg);
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}
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static void logicvc_plane_atomic_disable(struct drm_plane *drm_plane,
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struct drm_atomic_state *state)
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{
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struct logicvc_layer *layer = logicvc_layer(drm_plane);
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struct logicvc_drm *logicvc = logicvc_drm(drm_plane->dev);
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u32 index = layer->index;
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regmap_write(logicvc->regmap, LOGICVC_LAYER_CTRL_REG(index), 0);
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}
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static struct drm_plane_helper_funcs logicvc_plane_helper_funcs = {
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.atomic_check = logicvc_plane_atomic_check,
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.atomic_update = logicvc_plane_atomic_update,
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.atomic_disable = logicvc_plane_atomic_disable,
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};
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static const struct drm_plane_funcs logicvc_plane_funcs = {
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.update_plane = drm_atomic_helper_update_plane,
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.disable_plane = drm_atomic_helper_disable_plane,
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.destroy = drm_plane_cleanup,
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.reset = drm_atomic_helper_plane_reset,
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.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
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};
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int logicvc_layer_buffer_find_setup(struct logicvc_drm *logicvc,
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struct logicvc_layer *layer,
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struct drm_plane_state *state,
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struct logicvc_layer_buffer_setup *setup)
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{
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struct drm_device *drm_dev = &logicvc->drm_dev;
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struct drm_framebuffer *fb = state->fb;
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/* All the supported formats have a single data plane. */
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u32 layer_bytespp = fb->format->cpp[0];
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u32 layer_stride = layer_bytespp * logicvc->config.row_stride;
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u32 base_offset = layer->config.base_offset * layer_stride;
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u32 buffer_offset = layer->config.buffer_offset * layer_stride;
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u8 buffer_sel = 0;
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u16 voffset = 0;
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u16 hoffset = 0;
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phys_addr_t fb_addr;
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u32 fb_offset;
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u32 gap;
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if (!logicvc->reserved_mem_base) {
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drm_err(drm_dev, "No reserved memory base was registered!\n");
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return -ENOMEM;
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}
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fb_addr = drm_fb_dma_get_gem_addr(fb, state, 0);
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if (fb_addr < logicvc->reserved_mem_base) {
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drm_err(drm_dev,
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"Framebuffer memory below reserved memory base!\n");
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return -EINVAL;
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}
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fb_offset = (u32) (fb_addr - logicvc->reserved_mem_base);
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if (fb_offset < base_offset) {
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drm_err(drm_dev,
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"Framebuffer offset below layer base offset!\n");
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return -EINVAL;
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}
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gap = fb_offset - base_offset;
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/* Use the possible video buffers selection. */
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if (gap && buffer_offset) {
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buffer_sel = gap / buffer_offset;
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if (buffer_sel > LOGICVC_BUFFER_SEL_MAX)
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buffer_sel = LOGICVC_BUFFER_SEL_MAX;
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gap -= buffer_sel * buffer_offset;
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}
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/* Use the vertical offset. */
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if (gap && layer_stride && logicvc->config.layers_configurable) {
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voffset = gap / layer_stride;
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if (voffset > LOGICVC_LAYER_VOFFSET_MAX)
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voffset = LOGICVC_LAYER_VOFFSET_MAX;
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gap -= voffset * layer_stride;
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}
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/* Use the horizontal offset. */
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if (gap && layer_bytespp && logicvc->config.layers_configurable) {
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hoffset = gap / layer_bytespp;
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if (hoffset > LOGICVC_DIMENSIONS_MAX)
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hoffset = LOGICVC_DIMENSIONS_MAX;
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gap -= hoffset * layer_bytespp;
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}
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if (gap) {
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drm_err(drm_dev,
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"Unable to find layer %d buffer setup for 0x%x byte gap\n",
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layer->index, fb_offset - base_offset);
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return -EINVAL;
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}
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drm_dbg_kms(drm_dev, "Found layer %d buffer setup for 0x%x byte gap:\n",
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layer->index, fb_offset - base_offset);
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drm_dbg_kms(drm_dev, "- buffer_sel = 0x%x chunks of 0x%x bytes\n",
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buffer_sel, buffer_offset);
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drm_dbg_kms(drm_dev, "- voffset = 0x%x chunks of 0x%x bytes\n", voffset,
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layer_stride);
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drm_dbg_kms(drm_dev, "- hoffset = 0x%x chunks of 0x%x bytes\n", hoffset,
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layer_bytespp);
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if (setup) {
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setup->buffer_sel = buffer_sel;
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setup->voffset = voffset;
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setup->hoffset = hoffset;
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}
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return 0;
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}
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static struct logicvc_layer_formats *logicvc_layer_formats_lookup(struct logicvc_layer *layer)
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{
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bool alpha;
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unsigned int i = 0;
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alpha = (layer->config.alpha_mode == LOGICVC_LAYER_ALPHA_PIXEL);
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while (logicvc_layer_formats[i].formats) {
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if (logicvc_layer_formats[i].colorspace == layer->config.colorspace &&
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logicvc_layer_formats[i].depth == layer->config.depth &&
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logicvc_layer_formats[i].alpha == alpha)
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return &logicvc_layer_formats[i];
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i++;
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}
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return NULL;
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}
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static unsigned int logicvc_layer_formats_count(struct logicvc_layer_formats *formats)
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{
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unsigned int count = 0;
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while (formats->formats[count] != DRM_FORMAT_INVALID)
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count++;
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return count;
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}
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static int logicvc_layer_config_parse(struct logicvc_drm *logicvc,
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struct logicvc_layer *layer)
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{
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struct device_node *of_node = layer->of_node;
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struct logicvc_layer_config *config = &layer->config;
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int ret;
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logicvc_of_property_parse_bool(of_node,
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LOGICVC_OF_PROPERTY_LAYER_PRIMARY,
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&config->primary);
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ret = logicvc_of_property_parse_u32(of_node,
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LOGICVC_OF_PROPERTY_LAYER_COLORSPACE,
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&config->colorspace);
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if (ret)
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return ret;
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ret = logicvc_of_property_parse_u32(of_node,
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LOGICVC_OF_PROPERTY_LAYER_DEPTH,
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&config->depth);
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if (ret)
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return ret;
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ret = logicvc_of_property_parse_u32(of_node,
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LOGICVC_OF_PROPERTY_LAYER_ALPHA_MODE,
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&config->alpha_mode);
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if (ret)
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return ret;
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/*
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* Memory offset is only relevant without layer address configuration.
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*/
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if (logicvc->caps->layer_address)
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return 0;
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ret = logicvc_of_property_parse_u32(of_node,
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LOGICVC_OF_PROPERTY_LAYER_BASE_OFFSET,
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&config->base_offset);
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if (ret)
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return ret;
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ret = logicvc_of_property_parse_u32(of_node,
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LOGICVC_OF_PROPERTY_LAYER_BUFFER_OFFSET,
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&config->buffer_offset);
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if (ret)
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return ret;
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return 0;
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}
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struct logicvc_layer *logicvc_layer_get_from_index(struct logicvc_drm *logicvc,
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u32 index)
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{
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struct logicvc_layer *layer;
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list_for_each_entry(layer, &logicvc->layers_list, list)
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if (layer->index == index)
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return layer;
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return NULL;
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}
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struct logicvc_layer *logicvc_layer_get_from_type(struct logicvc_drm *logicvc,
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enum drm_plane_type type)
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{
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struct logicvc_layer *layer;
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list_for_each_entry(layer, &logicvc->layers_list, list)
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if (layer->drm_plane.type == type)
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return layer;
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return NULL;
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}
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struct logicvc_layer *logicvc_layer_get_primary(struct logicvc_drm *logicvc)
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{
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return logicvc_layer_get_from_type(logicvc, DRM_PLANE_TYPE_PRIMARY);
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}
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static int logicvc_layer_init(struct logicvc_drm *logicvc,
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struct device_node *of_node, u32 index)
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{
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struct drm_device *drm_dev = &logicvc->drm_dev;
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struct device *dev = drm_dev->dev;
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struct logicvc_layer *layer = NULL;
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struct logicvc_layer_formats *formats;
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unsigned int formats_count;
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enum drm_plane_type type;
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unsigned int zpos;
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int ret;
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layer = devm_kzalloc(dev, sizeof(*layer), GFP_KERNEL);
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if (!layer) {
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ret = -ENOMEM;
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goto error;
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}
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layer->of_node = of_node;
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layer->index = index;
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ret = logicvc_layer_config_parse(logicvc, layer);
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if (ret) {
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drm_err(drm_dev, "Failed to parse config for layer #%d\n",
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index);
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goto error;
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}
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formats = logicvc_layer_formats_lookup(layer);
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if (!formats) {
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drm_err(drm_dev, "Failed to lookup formats for layer #%d\n",
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index);
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ret = -EINVAL;
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goto error;
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}
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formats_count = logicvc_layer_formats_count(formats);
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/* The final layer can be configured as a background layer. */
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if (logicvc->config.background_layer &&
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index == (logicvc->config.layers_count - 1)) {
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/*
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* A zero value for black is only valid for RGB, not for YUV,
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* so this will need to take the format in account for YUV.
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*/
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u32 background = 0;
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drm_dbg_kms(drm_dev, "Using layer #%d as background layer\n",
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index);
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|
regmap_write(logicvc->regmap, LOGICVC_BACKGROUND_COLOR_REG,
|
|
background);
|
|
|
|
devm_kfree(dev, layer);
|
|
|
|
return 0;
|
|
}
|
|
|
|
if (layer->config.primary)
|
|
type = DRM_PLANE_TYPE_PRIMARY;
|
|
else
|
|
type = DRM_PLANE_TYPE_OVERLAY;
|
|
|
|
ret = drm_universal_plane_init(drm_dev, &layer->drm_plane, 0,
|
|
&logicvc_plane_funcs, formats->formats,
|
|
formats_count, NULL, type, NULL);
|
|
if (ret) {
|
|
drm_err(drm_dev, "Failed to initialize layer plane\n");
|
|
return ret;
|
|
}
|
|
|
|
drm_plane_helper_add(&layer->drm_plane, &logicvc_plane_helper_funcs);
|
|
|
|
zpos = logicvc->config.layers_count - index - 1;
|
|
drm_dbg_kms(drm_dev, "Giving layer #%d zpos %d\n", index, zpos);
|
|
|
|
if (layer->config.alpha_mode == LOGICVC_LAYER_ALPHA_LAYER)
|
|
drm_plane_create_alpha_property(&layer->drm_plane);
|
|
|
|
drm_plane_create_zpos_immutable_property(&layer->drm_plane, zpos);
|
|
|
|
drm_dbg_kms(drm_dev, "Registering layer #%d\n", index);
|
|
|
|
layer->formats = formats;
|
|
|
|
list_add_tail(&layer->list, &logicvc->layers_list);
|
|
|
|
return 0;
|
|
|
|
error:
|
|
if (layer)
|
|
devm_kfree(dev, layer);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void logicvc_layer_fini(struct logicvc_drm *logicvc,
|
|
struct logicvc_layer *layer)
|
|
{
|
|
struct device *dev = logicvc->drm_dev.dev;
|
|
|
|
list_del(&layer->list);
|
|
devm_kfree(dev, layer);
|
|
}
|
|
|
|
void logicvc_layers_attach_crtc(struct logicvc_drm *logicvc)
|
|
{
|
|
uint32_t possible_crtcs = drm_crtc_mask(&logicvc->crtc->drm_crtc);
|
|
struct logicvc_layer *layer;
|
|
|
|
list_for_each_entry(layer, &logicvc->layers_list, list) {
|
|
if (layer->drm_plane.type != DRM_PLANE_TYPE_OVERLAY)
|
|
continue;
|
|
|
|
layer->drm_plane.possible_crtcs = possible_crtcs;
|
|
}
|
|
}
|
|
|
|
int logicvc_layers_init(struct logicvc_drm *logicvc)
|
|
{
|
|
struct drm_device *drm_dev = &logicvc->drm_dev;
|
|
struct device *dev = drm_dev->dev;
|
|
struct device_node *of_node = dev->of_node;
|
|
struct device_node *layer_node = NULL;
|
|
struct device_node *layers_node;
|
|
struct logicvc_layer *layer;
|
|
struct logicvc_layer *next;
|
|
int ret = 0;
|
|
|
|
layers_node = of_get_child_by_name(of_node, "layers");
|
|
if (!layers_node) {
|
|
drm_err(drm_dev, "No layers node found in the description\n");
|
|
ret = -ENODEV;
|
|
goto error;
|
|
}
|
|
|
|
for_each_child_of_node(layers_node, layer_node) {
|
|
u32 index = 0;
|
|
|
|
if (!logicvc_of_node_is_layer(layer_node))
|
|
continue;
|
|
|
|
ret = of_property_read_u32(layer_node, "reg", &index);
|
|
if (ret)
|
|
continue;
|
|
|
|
layer = logicvc_layer_get_from_index(logicvc, index);
|
|
if (layer) {
|
|
drm_err(drm_dev, "Duplicated entry for layer #%d\n",
|
|
index);
|
|
continue;
|
|
}
|
|
|
|
ret = logicvc_layer_init(logicvc, layer_node, index);
|
|
if (ret) {
|
|
of_node_put(layers_node);
|
|
goto error;
|
|
}
|
|
}
|
|
|
|
of_node_put(layers_node);
|
|
|
|
return 0;
|
|
|
|
error:
|
|
list_for_each_entry_safe(layer, next, &logicvc->layers_list, list)
|
|
logicvc_layer_fini(logicvc, layer);
|
|
|
|
return ret;
|
|
}
|