138 lines
3.8 KiB
C
138 lines
3.8 KiB
C
/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include <subdev/bios.h>
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#include <subdev/bios/bit.h>
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#include <subdev/bios/mxm.h>
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u16
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mxm_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr)
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{
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struct nvkm_subdev *subdev = &bios->subdev;
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struct bit_entry x;
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if (bit_entry(bios, 'x', &x)) {
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nvkm_debug(subdev, "BIT 'x' table not present\n");
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return 0x0000;
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}
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*ver = x.version;
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*hdr = x.length;
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if (*ver != 1 || *hdr < 3) {
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nvkm_warn(subdev, "BIT 'x' table %d/%d unknown\n", *ver, *hdr);
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return 0x0000;
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}
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return x.offset;
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}
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/* These map MXM v2.x digital connection values to the appropriate SOR/link,
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* hopefully they're correct for all boards within the same chipset...
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*
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* MXM v3.x VBIOS are nicer and provide pointers to these tables.
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*/
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static u8 g84_sor_map[16] = {
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0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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};
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static u8 g92_sor_map[16] = {
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0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31,
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0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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};
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static u8 g94_sor_map[16] = {
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0x00, 0x14, 0x24, 0x11, 0x34, 0x31, 0x11, 0x31,
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0x11, 0x31, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00
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};
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static u8 g98_sor_map[16] = {
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0x00, 0x14, 0x12, 0x11, 0x00, 0x31, 0x11, 0x31,
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0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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};
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u8
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mxm_sor_map(struct nvkm_bios *bios, u8 conn)
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{
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struct nvkm_subdev *subdev = &bios->subdev;
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u8 ver, hdr;
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u16 mxm = mxm_table(bios, &ver, &hdr);
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if (mxm && hdr >= 6) {
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u16 map = nvbios_rd16(bios, mxm + 4);
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if (map) {
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ver = nvbios_rd08(bios, map);
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if (ver == 0x10 || ver == 0x11) {
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if (conn < nvbios_rd08(bios, map + 3)) {
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map += nvbios_rd08(bios, map + 1);
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map += conn;
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return nvbios_rd08(bios, map);
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}
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return 0x00;
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}
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nvkm_warn(subdev, "unknown sor map v%02x\n", ver);
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}
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}
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if (bios->version.chip == 0x84 || bios->version.chip == 0x86)
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return g84_sor_map[conn];
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if (bios->version.chip == 0x92)
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return g92_sor_map[conn];
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if (bios->version.chip == 0x94 || bios->version.chip == 0x96)
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return g94_sor_map[conn];
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if (bios->version.chip == 0x98)
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return g98_sor_map[conn];
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nvkm_warn(subdev, "missing sor map\n");
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return 0x00;
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}
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u8
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mxm_ddc_map(struct nvkm_bios *bios, u8 port)
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{
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struct nvkm_subdev *subdev = &bios->subdev;
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u8 ver, hdr;
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u16 mxm = mxm_table(bios, &ver, &hdr);
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if (mxm && hdr >= 8) {
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u16 map = nvbios_rd16(bios, mxm + 6);
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if (map) {
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ver = nvbios_rd08(bios, map);
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if (ver == 0x10) {
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if (port < nvbios_rd08(bios, map + 3)) {
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map += nvbios_rd08(bios, map + 1);
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map += port;
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return nvbios_rd08(bios, map);
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}
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return 0x00;
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}
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nvkm_warn(subdev, "unknown ddc map v%02x\n", ver);
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}
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}
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/* v2.x: directly write port as dcb i2cidx */
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return (port << 4) | port;
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}
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