614 lines
16 KiB
C
614 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* AFE4403 Heart Rate Monitors and Low-Cost Pulse Oximeters
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*
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* Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
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* Andrew F. Davis <afd@ti.com>
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*/
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/spi/spi.h>
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#include <linux/sysfs.h>
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#include <linux/regulator/consumer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/trigger.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <asm/unaligned.h>
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#include "afe440x.h"
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#define AFE4403_DRIVER_NAME "afe4403"
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/* AFE4403 Registers */
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#define AFE4403_TIAGAIN 0x20
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#define AFE4403_TIA_AMB_GAIN 0x21
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enum afe4403_fields {
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/* Gains */
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F_RF_LED1, F_CF_LED1,
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F_RF_LED, F_CF_LED,
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/* LED Current */
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F_ILED1, F_ILED2,
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/* sentinel */
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F_MAX_FIELDS
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};
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static const struct reg_field afe4403_reg_fields[] = {
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/* Gains */
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[F_RF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 0, 2),
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[F_CF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 3, 7),
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[F_RF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 0, 2),
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[F_CF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 3, 7),
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/* LED Current */
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[F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 7),
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[F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 8, 15),
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};
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/**
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* struct afe4403_data - AFE4403 device instance data
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* @dev: Device structure
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* @spi: SPI device handle
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* @regmap: Register map of the device
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* @fields: Register fields of the device
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* @regulator: Pointer to the regulator for the IC
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* @trig: IIO trigger for this device
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* @irq: ADC_RDY line interrupt number
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* @buffer: Used to construct data layout to push into IIO buffer.
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*/
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struct afe4403_data {
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struct device *dev;
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struct spi_device *spi;
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struct regmap *regmap;
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struct regmap_field *fields[F_MAX_FIELDS];
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struct regulator *regulator;
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struct iio_trigger *trig;
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int irq;
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/* Ensure suitable alignment for timestamp */
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s32 buffer[8] __aligned(8);
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};
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enum afe4403_chan_id {
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LED2 = 1,
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ALED2,
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LED1,
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ALED1,
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LED2_ALED2,
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LED1_ALED1,
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};
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static const unsigned int afe4403_channel_values[] = {
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[LED2] = AFE440X_LED2VAL,
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[ALED2] = AFE440X_ALED2VAL,
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[LED1] = AFE440X_LED1VAL,
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[ALED1] = AFE440X_ALED1VAL,
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[LED2_ALED2] = AFE440X_LED2_ALED2VAL,
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[LED1_ALED1] = AFE440X_LED1_ALED1VAL,
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};
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static const unsigned int afe4403_channel_leds[] = {
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[LED2] = F_ILED2,
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[LED1] = F_ILED1,
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};
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static const struct iio_chan_spec afe4403_channels[] = {
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/* ADC values */
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AFE440X_INTENSITY_CHAN(LED2, 0),
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AFE440X_INTENSITY_CHAN(ALED2, 0),
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AFE440X_INTENSITY_CHAN(LED1, 0),
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AFE440X_INTENSITY_CHAN(ALED1, 0),
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AFE440X_INTENSITY_CHAN(LED2_ALED2, 0),
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AFE440X_INTENSITY_CHAN(LED1_ALED1, 0),
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/* LED current */
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AFE440X_CURRENT_CHAN(LED2),
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AFE440X_CURRENT_CHAN(LED1),
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};
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static const struct afe440x_val_table afe4403_res_table[] = {
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{ 500000 }, { 250000 }, { 100000 }, { 50000 },
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{ 25000 }, { 10000 }, { 1000000 }, { 0 },
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};
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AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4403_res_table);
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static const struct afe440x_val_table afe4403_cap_table[] = {
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{ 0, 5000 }, { 0, 10000 }, { 0, 20000 }, { 0, 25000 },
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{ 0, 30000 }, { 0, 35000 }, { 0, 45000 }, { 0, 50000 },
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{ 0, 55000 }, { 0, 60000 }, { 0, 70000 }, { 0, 75000 },
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{ 0, 80000 }, { 0, 85000 }, { 0, 95000 }, { 0, 100000 },
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{ 0, 155000 }, { 0, 160000 }, { 0, 170000 }, { 0, 175000 },
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{ 0, 180000 }, { 0, 185000 }, { 0, 195000 }, { 0, 200000 },
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{ 0, 205000 }, { 0, 210000 }, { 0, 220000 }, { 0, 225000 },
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{ 0, 230000 }, { 0, 235000 }, { 0, 245000 }, { 0, 250000 },
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};
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AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4403_cap_table);
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static ssize_t afe440x_show_register(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct afe4403_data *afe = iio_priv(indio_dev);
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struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
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unsigned int reg_val;
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int vals[2];
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int ret;
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ret = regmap_field_read(afe->fields[afe440x_attr->field], ®_val);
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if (ret)
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return ret;
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if (reg_val >= afe440x_attr->table_size)
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return -EINVAL;
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vals[0] = afe440x_attr->val_table[reg_val].integer;
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vals[1] = afe440x_attr->val_table[reg_val].fract;
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return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals);
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}
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static ssize_t afe440x_store_register(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct iio_dev *indio_dev = dev_to_iio_dev(dev);
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struct afe4403_data *afe = iio_priv(indio_dev);
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struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
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int val, integer, fract, ret;
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ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract);
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if (ret)
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return ret;
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for (val = 0; val < afe440x_attr->table_size; val++)
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if (afe440x_attr->val_table[val].integer == integer &&
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afe440x_attr->val_table[val].fract == fract)
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break;
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if (val == afe440x_attr->table_size)
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return -EINVAL;
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ret = regmap_field_write(afe->fields[afe440x_attr->field], val);
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if (ret)
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return ret;
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return count;
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}
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static AFE440X_ATTR(in_intensity1_resistance, F_RF_LED, afe4403_res_table);
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static AFE440X_ATTR(in_intensity1_capacitance, F_CF_LED, afe4403_cap_table);
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static AFE440X_ATTR(in_intensity2_resistance, F_RF_LED, afe4403_res_table);
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static AFE440X_ATTR(in_intensity2_capacitance, F_CF_LED, afe4403_cap_table);
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static AFE440X_ATTR(in_intensity3_resistance, F_RF_LED1, afe4403_res_table);
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static AFE440X_ATTR(in_intensity3_capacitance, F_CF_LED1, afe4403_cap_table);
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static AFE440X_ATTR(in_intensity4_resistance, F_RF_LED1, afe4403_res_table);
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static AFE440X_ATTR(in_intensity4_capacitance, F_CF_LED1, afe4403_cap_table);
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static struct attribute *afe440x_attributes[] = {
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&dev_attr_in_intensity_resistance_available.attr,
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&dev_attr_in_intensity_capacitance_available.attr,
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&afe440x_attr_in_intensity1_resistance.dev_attr.attr,
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&afe440x_attr_in_intensity1_capacitance.dev_attr.attr,
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&afe440x_attr_in_intensity2_resistance.dev_attr.attr,
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&afe440x_attr_in_intensity2_capacitance.dev_attr.attr,
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&afe440x_attr_in_intensity3_resistance.dev_attr.attr,
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&afe440x_attr_in_intensity3_capacitance.dev_attr.attr,
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&afe440x_attr_in_intensity4_resistance.dev_attr.attr,
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&afe440x_attr_in_intensity4_capacitance.dev_attr.attr,
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NULL
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};
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static const struct attribute_group afe440x_attribute_group = {
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.attrs = afe440x_attributes
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};
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static int afe4403_read(struct afe4403_data *afe, unsigned int reg, u32 *val)
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{
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u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
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u8 rx[3];
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int ret;
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/* Enable reading from the device */
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ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
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if (ret)
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return ret;
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ret = spi_write_then_read(afe->spi, ®, 1, rx, sizeof(rx));
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if (ret)
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return ret;
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*val = get_unaligned_be24(&rx[0]);
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/* Disable reading from the device */
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tx[3] = AFE440X_CONTROL0_WRITE;
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ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
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if (ret)
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return ret;
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return 0;
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}
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static int afe4403_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct afe4403_data *afe = iio_priv(indio_dev);
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unsigned int reg, field;
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int ret;
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switch (chan->type) {
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case IIO_INTENSITY:
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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reg = afe4403_channel_values[chan->address];
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ret = afe4403_read(afe, reg, val);
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if (ret)
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return ret;
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return IIO_VAL_INT;
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}
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break;
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case IIO_CURRENT:
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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field = afe4403_channel_leds[chan->address];
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ret = regmap_field_read(afe->fields[field], val);
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if (ret)
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return ret;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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*val = 0;
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*val2 = 800000;
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return IIO_VAL_INT_PLUS_MICRO;
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}
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break;
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default:
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break;
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}
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return -EINVAL;
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}
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static int afe4403_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct afe4403_data *afe = iio_priv(indio_dev);
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unsigned int field = afe4403_channel_leds[chan->address];
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switch (chan->type) {
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case IIO_CURRENT:
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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return regmap_field_write(afe->fields[field], val);
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}
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break;
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default:
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break;
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}
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return -EINVAL;
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}
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static const struct iio_info afe4403_iio_info = {
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.attrs = &afe440x_attribute_group,
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.read_raw = afe4403_read_raw,
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.write_raw = afe4403_write_raw,
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};
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static irqreturn_t afe4403_trigger_handler(int irq, void *private)
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{
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struct iio_poll_func *pf = private;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct afe4403_data *afe = iio_priv(indio_dev);
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int ret, bit, i = 0;
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u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
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u8 rx[3];
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/* Enable reading from the device */
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ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
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if (ret)
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goto err;
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for_each_set_bit(bit, indio_dev->active_scan_mask,
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indio_dev->masklength) {
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ret = spi_write_then_read(afe->spi,
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&afe4403_channel_values[bit], 1,
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rx, sizeof(rx));
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if (ret)
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goto err;
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afe->buffer[i++] = get_unaligned_be24(&rx[0]);
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}
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/* Disable reading from the device */
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tx[3] = AFE440X_CONTROL0_WRITE;
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ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
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if (ret)
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goto err;
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iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer,
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pf->timestamp);
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err:
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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#define AFE4403_TIMING_PAIRS \
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{ AFE440X_LED2STC, 0x000050 }, \
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{ AFE440X_LED2ENDC, 0x0003e7 }, \
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{ AFE440X_LED1LEDSTC, 0x0007d0 }, \
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{ AFE440X_LED1LEDENDC, 0x000bb7 }, \
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{ AFE440X_ALED2STC, 0x000438 }, \
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{ AFE440X_ALED2ENDC, 0x0007cf }, \
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{ AFE440X_LED1STC, 0x000820 }, \
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{ AFE440X_LED1ENDC, 0x000bb7 }, \
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{ AFE440X_LED2LEDSTC, 0x000000 }, \
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{ AFE440X_LED2LEDENDC, 0x0003e7 }, \
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{ AFE440X_ALED1STC, 0x000c08 }, \
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{ AFE440X_ALED1ENDC, 0x000f9f }, \
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{ AFE440X_LED2CONVST, 0x0003ef }, \
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{ AFE440X_LED2CONVEND, 0x0007cf }, \
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{ AFE440X_ALED2CONVST, 0x0007d7 }, \
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{ AFE440X_ALED2CONVEND, 0x000bb7 }, \
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{ AFE440X_LED1CONVST, 0x000bbf }, \
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{ AFE440X_LED1CONVEND, 0x009c3f }, \
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{ AFE440X_ALED1CONVST, 0x000fa7 }, \
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{ AFE440X_ALED1CONVEND, 0x001387 }, \
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{ AFE440X_ADCRSTSTCT0, 0x0003e8 }, \
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{ AFE440X_ADCRSTENDCT0, 0x0003eb }, \
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{ AFE440X_ADCRSTSTCT1, 0x0007d0 }, \
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{ AFE440X_ADCRSTENDCT1, 0x0007d3 }, \
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{ AFE440X_ADCRSTSTCT2, 0x000bb8 }, \
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{ AFE440X_ADCRSTENDCT2, 0x000bbb }, \
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{ AFE440X_ADCRSTSTCT3, 0x000fa0 }, \
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{ AFE440X_ADCRSTENDCT3, 0x000fa3 }, \
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{ AFE440X_PRPCOUNT, 0x009c3f }, \
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{ AFE440X_PDNCYCLESTC, 0x001518 }, \
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{ AFE440X_PDNCYCLEENDC, 0x00991f }
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static const struct reg_sequence afe4403_reg_sequences[] = {
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AFE4403_TIMING_PAIRS,
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{ AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN },
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{ AFE4403_TIAGAIN, AFE440X_TIAGAIN_ENSEPGAIN },
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};
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static const struct regmap_range afe4403_yes_ranges[] = {
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regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL),
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};
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static const struct regmap_access_table afe4403_volatile_table = {
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.yes_ranges = afe4403_yes_ranges,
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.n_yes_ranges = ARRAY_SIZE(afe4403_yes_ranges),
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};
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static const struct regmap_config afe4403_regmap_config = {
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.reg_bits = 8,
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.val_bits = 24,
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.max_register = AFE440X_PDNCYCLEENDC,
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.cache_type = REGCACHE_RBTREE,
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.volatile_table = &afe4403_volatile_table,
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};
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static const struct of_device_id afe4403_of_match[] = {
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{ .compatible = "ti,afe4403", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, afe4403_of_match);
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static int afe4403_suspend(struct device *dev)
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{
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struct iio_dev *indio_dev = spi_get_drvdata(to_spi_device(dev));
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struct afe4403_data *afe = iio_priv(indio_dev);
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int ret;
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ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
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AFE440X_CONTROL2_PDN_AFE,
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AFE440X_CONTROL2_PDN_AFE);
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if (ret)
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return ret;
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ret = regulator_disable(afe->regulator);
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if (ret) {
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dev_err(dev, "Unable to disable regulator\n");
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return ret;
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}
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return 0;
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}
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static int afe4403_resume(struct device *dev)
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{
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struct iio_dev *indio_dev = spi_get_drvdata(to_spi_device(dev));
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struct afe4403_data *afe = iio_priv(indio_dev);
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int ret;
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ret = regulator_enable(afe->regulator);
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if (ret) {
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dev_err(dev, "Unable to enable regulator\n");
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return ret;
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}
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ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
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AFE440X_CONTROL2_PDN_AFE, 0);
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if (ret)
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return ret;
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return 0;
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}
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static DEFINE_SIMPLE_DEV_PM_OPS(afe4403_pm_ops, afe4403_suspend,
|
|
afe4403_resume);
|
|
|
|
static int afe4403_probe(struct spi_device *spi)
|
|
{
|
|
struct iio_dev *indio_dev;
|
|
struct afe4403_data *afe;
|
|
int i, ret;
|
|
|
|
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*afe));
|
|
if (!indio_dev)
|
|
return -ENOMEM;
|
|
|
|
afe = iio_priv(indio_dev);
|
|
spi_set_drvdata(spi, indio_dev);
|
|
|
|
afe->dev = &spi->dev;
|
|
afe->spi = spi;
|
|
afe->irq = spi->irq;
|
|
|
|
afe->regmap = devm_regmap_init_spi(spi, &afe4403_regmap_config);
|
|
if (IS_ERR(afe->regmap)) {
|
|
dev_err(afe->dev, "Unable to allocate register map\n");
|
|
return PTR_ERR(afe->regmap);
|
|
}
|
|
|
|
for (i = 0; i < F_MAX_FIELDS; i++) {
|
|
afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap,
|
|
afe4403_reg_fields[i]);
|
|
if (IS_ERR(afe->fields[i])) {
|
|
dev_err(afe->dev, "Unable to allocate regmap fields\n");
|
|
return PTR_ERR(afe->fields[i]);
|
|
}
|
|
}
|
|
|
|
afe->regulator = devm_regulator_get(afe->dev, "tx_sup");
|
|
if (IS_ERR(afe->regulator))
|
|
return dev_err_probe(afe->dev, PTR_ERR(afe->regulator),
|
|
"Unable to get regulator\n");
|
|
|
|
ret = regulator_enable(afe->regulator);
|
|
if (ret) {
|
|
dev_err(afe->dev, "Unable to enable regulator\n");
|
|
return ret;
|
|
}
|
|
|
|
ret = regmap_write(afe->regmap, AFE440X_CONTROL0,
|
|
AFE440X_CONTROL0_SW_RESET);
|
|
if (ret) {
|
|
dev_err(afe->dev, "Unable to reset device\n");
|
|
goto err_disable_reg;
|
|
}
|
|
|
|
ret = regmap_multi_reg_write(afe->regmap, afe4403_reg_sequences,
|
|
ARRAY_SIZE(afe4403_reg_sequences));
|
|
if (ret) {
|
|
dev_err(afe->dev, "Unable to set register defaults\n");
|
|
goto err_disable_reg;
|
|
}
|
|
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
indio_dev->channels = afe4403_channels;
|
|
indio_dev->num_channels = ARRAY_SIZE(afe4403_channels);
|
|
indio_dev->name = AFE4403_DRIVER_NAME;
|
|
indio_dev->info = &afe4403_iio_info;
|
|
|
|
if (afe->irq > 0) {
|
|
afe->trig = devm_iio_trigger_alloc(afe->dev,
|
|
"%s-dev%d",
|
|
indio_dev->name,
|
|
iio_device_id(indio_dev));
|
|
if (!afe->trig) {
|
|
dev_err(afe->dev, "Unable to allocate IIO trigger\n");
|
|
ret = -ENOMEM;
|
|
goto err_disable_reg;
|
|
}
|
|
|
|
iio_trigger_set_drvdata(afe->trig, indio_dev);
|
|
|
|
ret = iio_trigger_register(afe->trig);
|
|
if (ret) {
|
|
dev_err(afe->dev, "Unable to register IIO trigger\n");
|
|
goto err_disable_reg;
|
|
}
|
|
|
|
ret = devm_request_threaded_irq(afe->dev, afe->irq,
|
|
iio_trigger_generic_data_rdy_poll,
|
|
NULL, IRQF_ONESHOT,
|
|
AFE4403_DRIVER_NAME,
|
|
afe->trig);
|
|
if (ret) {
|
|
dev_err(afe->dev, "Unable to request IRQ\n");
|
|
goto err_trig;
|
|
}
|
|
}
|
|
|
|
ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
|
|
afe4403_trigger_handler, NULL);
|
|
if (ret) {
|
|
dev_err(afe->dev, "Unable to setup buffer\n");
|
|
goto err_trig;
|
|
}
|
|
|
|
ret = iio_device_register(indio_dev);
|
|
if (ret) {
|
|
dev_err(afe->dev, "Unable to register IIO device\n");
|
|
goto err_buff;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_buff:
|
|
iio_triggered_buffer_cleanup(indio_dev);
|
|
err_trig:
|
|
if (afe->irq > 0)
|
|
iio_trigger_unregister(afe->trig);
|
|
err_disable_reg:
|
|
regulator_disable(afe->regulator);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void afe4403_remove(struct spi_device *spi)
|
|
{
|
|
struct iio_dev *indio_dev = spi_get_drvdata(spi);
|
|
struct afe4403_data *afe = iio_priv(indio_dev);
|
|
int ret;
|
|
|
|
iio_device_unregister(indio_dev);
|
|
|
|
iio_triggered_buffer_cleanup(indio_dev);
|
|
|
|
if (afe->irq > 0)
|
|
iio_trigger_unregister(afe->trig);
|
|
|
|
ret = regulator_disable(afe->regulator);
|
|
if (ret)
|
|
dev_warn(afe->dev, "Unable to disable regulator\n");
|
|
}
|
|
|
|
static const struct spi_device_id afe4403_ids[] = {
|
|
{ "afe4403", 0 },
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(spi, afe4403_ids);
|
|
|
|
static struct spi_driver afe4403_spi_driver = {
|
|
.driver = {
|
|
.name = AFE4403_DRIVER_NAME,
|
|
.of_match_table = afe4403_of_match,
|
|
.pm = pm_sleep_ptr(&afe4403_pm_ops),
|
|
},
|
|
.probe = afe4403_probe,
|
|
.remove = afe4403_remove,
|
|
.id_table = afe4403_ids,
|
|
};
|
|
module_spi_driver(afe4403_spi_driver);
|
|
|
|
MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
|
|
MODULE_DESCRIPTION("TI AFE4403 Heart Rate Monitor and Pulse Oximeter AFE");
|
|
MODULE_LICENSE("GPL v2");
|