551 lines
15 KiB
C
551 lines
15 KiB
C
/* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB */
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/* Copyright (c) 2015 - 2021 Intel Corporation */
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#ifndef IRDMA_MAIN_H
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#define IRDMA_MAIN_H
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#include <linux/ip.h>
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#include <linux/tcp.h>
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#include <linux/if_vlan.h>
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#include <net/addrconf.h>
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#include <net/netevent.h>
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#include <net/tcp.h>
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#include <net/ip6_route.h>
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#include <net/flow.h>
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#include <net/secure_seq.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/inetdevice.h>
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#include <linux/spinlock.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <linux/dma-mapping.h>
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#include <linux/workqueue.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/crc32c.h>
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#include <linux/kthread.h>
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#ifndef CONFIG_64BIT
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#include <linux/io-64-nonatomic-lo-hi.h>
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#endif
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#include <linux/auxiliary_bus.h>
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#include <linux/net/intel/iidc.h>
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#include <crypto/hash.h>
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#include <rdma/ib_smi.h>
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#include <rdma/ib_verbs.h>
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#include <rdma/ib_pack.h>
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#include <rdma/rdma_cm.h>
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#include <rdma/iw_cm.h>
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#include <rdma/ib_user_verbs.h>
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#include <rdma/ib_umem.h>
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#include <rdma/ib_cache.h>
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#include <rdma/uverbs_ioctl.h>
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#include "osdep.h"
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#include "defs.h"
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#include "hmc.h"
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#include "type.h"
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#include "ws.h"
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#include "protos.h"
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#include "pble.h"
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#include "cm.h"
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#include <rdma/irdma-abi.h>
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#include "verbs.h"
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#include "user.h"
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#include "puda.h"
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extern struct auxiliary_driver i40iw_auxiliary_drv;
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#define IRDMA_FW_VER_DEFAULT 2
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#define IRDMA_HW_VER 2
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#define IRDMA_ARP_ADD 1
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#define IRDMA_ARP_DELETE 2
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#define IRDMA_ARP_RESOLVE 3
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#define IRDMA_MACIP_ADD 1
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#define IRDMA_MACIP_DELETE 2
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#define IW_CCQ_SIZE (IRDMA_CQP_SW_SQSIZE_2048 + 1)
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#define IW_CEQ_SIZE 2048
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#define IW_AEQ_SIZE 2048
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#define RX_BUF_SIZE (1536 + 8)
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#define IW_REG0_SIZE (4 * 1024)
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#define IW_TX_TIMEOUT (6 * HZ)
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#define IW_FIRST_QPN 1
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#define IW_SW_CONTEXT_ALIGN 1024
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#define MAX_DPC_ITERATIONS 128
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#define IRDMA_EVENT_TIMEOUT 50000
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#define IRDMA_VCHNL_EVENT_TIMEOUT 100000
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#define IRDMA_RST_TIMEOUT_HZ 4
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#define IRDMA_NO_QSET 0xffff
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#define IW_CFG_FPM_QP_COUNT 32768
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#define IRDMA_MAX_PAGES_PER_FMR 262144
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#define IRDMA_MIN_PAGES_PER_FMR 1
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#define IRDMA_CQP_COMPL_RQ_WQE_FLUSHED 2
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#define IRDMA_CQP_COMPL_SQ_WQE_FLUSHED 3
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#define IRDMA_Q_TYPE_PE_AEQ 0x80
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#define IRDMA_Q_INVALID_IDX 0xffff
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#define IRDMA_REM_ENDPOINT_TRK_QPID 3
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#define IRDMA_DRV_OPT_ENA_MPA_VER_0 0x00000001
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#define IRDMA_DRV_OPT_DISABLE_MPA_CRC 0x00000002
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#define IRDMA_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004
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#define IRDMA_DRV_OPT_DISABLE_INTF 0x00000008
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#define IRDMA_DRV_OPT_ENA_MSI 0x00000010
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#define IRDMA_DRV_OPT_DUAL_LOGICAL_PORT 0x00000020
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#define IRDMA_DRV_OPT_NO_INLINE_DATA 0x00000080
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#define IRDMA_DRV_OPT_DISABLE_INT_MOD 0x00000100
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#define IRDMA_DRV_OPT_DISABLE_VIRT_WQ 0x00000200
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#define IRDMA_DRV_OPT_ENA_PAU 0x00000400
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#define IRDMA_DRV_OPT_MCAST_LOGPORT_MAP 0x00000800
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#define IW_HMC_OBJ_TYPE_NUM ARRAY_SIZE(iw_hmc_obj_types)
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#define IRDMA_ROCE_CWND_DEFAULT 0x400
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#define IRDMA_ROCE_ACKCREDS_DEFAULT 0x1E
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#define IRDMA_FLUSH_SQ BIT(0)
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#define IRDMA_FLUSH_RQ BIT(1)
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#define IRDMA_REFLUSH BIT(2)
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#define IRDMA_FLUSH_WAIT BIT(3)
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enum init_completion_state {
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INVALID_STATE = 0,
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INITIAL_STATE,
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CQP_CREATED,
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HMC_OBJS_CREATED,
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HW_RSRC_INITIALIZED,
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CCQ_CREATED,
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CEQ0_CREATED, /* Last state of probe */
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ILQ_CREATED,
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IEQ_CREATED,
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CEQS_CREATED,
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PBLE_CHUNK_MEM,
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AEQ_CREATED,
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IP_ADDR_REGISTERED, /* Last state of open */
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};
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struct irdma_rsrc_limits {
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u32 qplimit;
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u32 mrlimit;
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u32 cqlimit;
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};
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struct irdma_cqp_err_info {
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u16 maj;
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u16 min;
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const char *desc;
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};
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struct irdma_cqp_compl_info {
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u32 op_ret_val;
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u16 maj_err_code;
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u16 min_err_code;
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bool error;
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u8 op_code;
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};
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struct irdma_cqp_request {
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struct cqp_cmds_info info;
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wait_queue_head_t waitq;
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struct list_head list;
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refcount_t refcnt;
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void (*callback_fcn)(struct irdma_cqp_request *cqp_request);
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void *param;
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struct irdma_cqp_compl_info compl_info;
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bool waiting:1;
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bool request_done:1;
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bool dynamic:1;
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};
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struct irdma_cqp {
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struct irdma_sc_cqp sc_cqp;
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spinlock_t req_lock; /* protect CQP request list */
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spinlock_t compl_lock; /* protect CQP completion processing */
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wait_queue_head_t waitq;
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wait_queue_head_t remove_wq;
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struct irdma_dma_mem sq;
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struct irdma_dma_mem host_ctx;
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u64 *scratch_array;
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struct irdma_cqp_request *cqp_requests;
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struct list_head cqp_avail_reqs;
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struct list_head cqp_pending_reqs;
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};
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struct irdma_ccq {
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struct irdma_sc_cq sc_cq;
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struct irdma_dma_mem mem_cq;
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struct irdma_dma_mem shadow_area;
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};
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struct irdma_ceq {
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struct irdma_sc_ceq sc_ceq;
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struct irdma_dma_mem mem;
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u32 irq;
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u32 msix_idx;
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struct irdma_pci_f *rf;
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struct tasklet_struct dpc_tasklet;
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spinlock_t ce_lock; /* sync cq destroy with cq completion event notification */
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};
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struct irdma_aeq {
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struct irdma_sc_aeq sc_aeq;
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struct irdma_dma_mem mem;
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struct irdma_pble_alloc palloc;
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bool virtual_map;
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};
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struct irdma_arp_entry {
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u32 ip_addr[4];
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u8 mac_addr[ETH_ALEN];
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};
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struct irdma_msix_vector {
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u32 idx;
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u32 irq;
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u32 cpu_affinity;
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u32 ceq_id;
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cpumask_t mask;
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};
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struct irdma_mc_table_info {
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u32 mgn;
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u32 dest_ip[4];
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bool lan_fwd:1;
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bool ipv4_valid:1;
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};
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struct mc_table_list {
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struct list_head list;
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struct irdma_mc_table_info mc_info;
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struct irdma_mcast_grp_info mc_grp_ctx;
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};
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struct irdma_qv_info {
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u32 v_idx; /* msix_vector */
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u16 ceq_idx;
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u16 aeq_idx;
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u8 itr_idx;
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};
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struct irdma_qvlist_info {
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u32 num_vectors;
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struct irdma_qv_info qv_info[1];
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};
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struct irdma_gen_ops {
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void (*request_reset)(struct irdma_pci_f *rf);
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int (*register_qset)(struct irdma_sc_vsi *vsi,
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struct irdma_ws_node *tc_node);
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void (*unregister_qset)(struct irdma_sc_vsi *vsi,
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struct irdma_ws_node *tc_node);
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};
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struct irdma_pci_f {
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bool reset:1;
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bool rsrc_created:1;
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bool msix_shared:1;
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u8 rsrc_profile;
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u8 *hmc_info_mem;
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u8 *mem_rsrc;
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u8 rdma_ver;
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u8 rst_to;
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u8 pf_id;
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enum irdma_protocol_used protocol_used;
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u32 sd_type;
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u32 msix_count;
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u32 max_mr;
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u32 max_qp;
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u32 max_cq;
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u32 max_ah;
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u32 next_ah;
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u32 max_mcg;
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u32 next_mcg;
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u32 max_pd;
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u32 next_qp;
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u32 next_cq;
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u32 next_pd;
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u32 max_mr_size;
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u32 max_cqe;
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u32 mr_stagmask;
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u32 used_pds;
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u32 used_cqs;
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u32 used_mrs;
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u32 used_qps;
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u32 arp_table_size;
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u32 next_arp_index;
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u32 ceqs_count;
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u32 next_ws_node_id;
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u32 max_ws_node_id;
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u32 limits_sel;
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unsigned long *allocated_ws_nodes;
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unsigned long *allocated_qps;
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unsigned long *allocated_cqs;
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unsigned long *allocated_mrs;
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unsigned long *allocated_pds;
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unsigned long *allocated_mcgs;
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unsigned long *allocated_ahs;
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unsigned long *allocated_arps;
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enum init_completion_state init_state;
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struct irdma_sc_dev sc_dev;
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struct pci_dev *pcidev;
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void *cdev;
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struct irdma_hw hw;
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struct irdma_cqp cqp;
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struct irdma_ccq ccq;
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struct irdma_aeq aeq;
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struct irdma_ceq *ceqlist;
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struct irdma_hmc_pble_rsrc *pble_rsrc;
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struct irdma_arp_entry *arp_table;
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spinlock_t arp_lock; /*protect ARP table access*/
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spinlock_t rsrc_lock; /* protect HW resource array access */
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spinlock_t qptable_lock; /*protect QP table access*/
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struct irdma_qp **qp_table;
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spinlock_t qh_list_lock; /* protect mc_qht_list */
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struct mc_table_list mc_qht_list;
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struct irdma_msix_vector *iw_msixtbl;
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struct irdma_qvlist_info *iw_qvlist;
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struct tasklet_struct dpc_tasklet;
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struct msix_entry *msix_entries;
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struct irdma_dma_mem obj_mem;
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struct irdma_dma_mem obj_next;
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atomic_t vchnl_msgs;
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wait_queue_head_t vchnl_waitq;
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struct workqueue_struct *cqp_cmpl_wq;
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struct work_struct cqp_cmpl_work;
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struct irdma_sc_vsi default_vsi;
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void *back_fcn;
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struct irdma_gen_ops gen_ops;
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struct irdma_device *iwdev;
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};
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struct irdma_device {
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struct ib_device ibdev;
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struct irdma_pci_f *rf;
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struct net_device *netdev;
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struct workqueue_struct *cleanup_wq;
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struct irdma_sc_vsi vsi;
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struct irdma_cm_core cm_core;
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DECLARE_HASHTABLE(ah_hash_tbl, 8);
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struct mutex ah_tbl_lock; /* protect AH hash table access */
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u32 roce_cwnd;
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u32 roce_ackcreds;
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u32 vendor_id;
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u32 vendor_part_id;
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u32 push_mode;
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u32 rcv_wnd;
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u16 mac_ip_table_idx;
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u16 vsi_num;
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u8 rcv_wscale;
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u8 iw_status;
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bool roce_mode:1;
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bool roce_dcqcn_en:1;
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bool dcb_vlan_mode:1;
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bool iw_ooo:1;
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enum init_completion_state init_state;
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wait_queue_head_t suspend_wq;
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};
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static inline struct irdma_device *to_iwdev(struct ib_device *ibdev)
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{
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return container_of(ibdev, struct irdma_device, ibdev);
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}
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static inline struct irdma_ucontext *to_ucontext(struct ib_ucontext *ibucontext)
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{
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return container_of(ibucontext, struct irdma_ucontext, ibucontext);
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}
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static inline struct irdma_user_mmap_entry *
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to_irdma_mmap_entry(struct rdma_user_mmap_entry *rdma_entry)
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{
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return container_of(rdma_entry, struct irdma_user_mmap_entry,
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rdma_entry);
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}
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static inline struct irdma_pd *to_iwpd(struct ib_pd *ibpd)
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{
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return container_of(ibpd, struct irdma_pd, ibpd);
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}
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static inline struct irdma_ah *to_iwah(struct ib_ah *ibah)
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{
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return container_of(ibah, struct irdma_ah, ibah);
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}
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static inline struct irdma_mr *to_iwmr(struct ib_mr *ibmr)
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{
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return container_of(ibmr, struct irdma_mr, ibmr);
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}
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static inline struct irdma_mr *to_iwmw(struct ib_mw *ibmw)
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{
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return container_of(ibmw, struct irdma_mr, ibmw);
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}
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static inline struct irdma_cq *to_iwcq(struct ib_cq *ibcq)
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{
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return container_of(ibcq, struct irdma_cq, ibcq);
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}
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static inline struct irdma_qp *to_iwqp(struct ib_qp *ibqp)
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{
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return container_of(ibqp, struct irdma_qp, ibqp);
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}
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static inline struct irdma_pci_f *dev_to_rf(struct irdma_sc_dev *dev)
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{
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return container_of(dev, struct irdma_pci_f, sc_dev);
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}
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/**
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* irdma_alloc_resource - allocate a resource
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* @iwdev: device pointer
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* @resource_array: resource bit array:
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* @max_resources: maximum resource number
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* @req_resources_num: Allocated resource number
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* @next: next free id
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**/
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static inline int irdma_alloc_rsrc(struct irdma_pci_f *rf,
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unsigned long *rsrc_array, u32 max_rsrc,
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u32 *req_rsrc_num, u32 *next)
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{
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u32 rsrc_num;
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unsigned long flags;
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spin_lock_irqsave(&rf->rsrc_lock, flags);
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rsrc_num = find_next_zero_bit(rsrc_array, max_rsrc, *next);
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if (rsrc_num >= max_rsrc) {
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rsrc_num = find_first_zero_bit(rsrc_array, max_rsrc);
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if (rsrc_num >= max_rsrc) {
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spin_unlock_irqrestore(&rf->rsrc_lock, flags);
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ibdev_dbg(&rf->iwdev->ibdev,
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"ERR: resource [%d] allocation failed\n",
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rsrc_num);
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return -EOVERFLOW;
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}
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}
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__set_bit(rsrc_num, rsrc_array);
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*next = rsrc_num + 1;
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if (*next == max_rsrc)
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*next = 0;
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*req_rsrc_num = rsrc_num;
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spin_unlock_irqrestore(&rf->rsrc_lock, flags);
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return 0;
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}
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/**
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* irdma_free_resource - free a resource
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* @iwdev: device pointer
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* @resource_array: resource array for the resource_num
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* @resource_num: resource number to free
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**/
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static inline void irdma_free_rsrc(struct irdma_pci_f *rf,
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unsigned long *rsrc_array, u32 rsrc_num)
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{
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unsigned long flags;
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spin_lock_irqsave(&rf->rsrc_lock, flags);
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__clear_bit(rsrc_num, rsrc_array);
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spin_unlock_irqrestore(&rf->rsrc_lock, flags);
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}
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int irdma_ctrl_init_hw(struct irdma_pci_f *rf);
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void irdma_ctrl_deinit_hw(struct irdma_pci_f *rf);
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int irdma_rt_init_hw(struct irdma_device *iwdev,
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struct irdma_l2params *l2params);
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void irdma_rt_deinit_hw(struct irdma_device *iwdev);
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void irdma_qp_add_ref(struct ib_qp *ibqp);
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void irdma_qp_rem_ref(struct ib_qp *ibqp);
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void irdma_free_lsmm_rsrc(struct irdma_qp *iwqp);
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struct ib_qp *irdma_get_qp(struct ib_device *ibdev, int qpn);
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void irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask);
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void irdma_manage_arp_cache(struct irdma_pci_f *rf,
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const unsigned char *mac_addr,
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u32 *ip_addr, bool ipv4, u32 action);
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struct irdma_apbvt_entry *irdma_add_apbvt(struct irdma_device *iwdev, u16 port);
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void irdma_del_apbvt(struct irdma_device *iwdev,
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struct irdma_apbvt_entry *entry);
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struct irdma_cqp_request *irdma_alloc_and_get_cqp_request(struct irdma_cqp *cqp,
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bool wait);
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void irdma_free_cqp_request(struct irdma_cqp *cqp,
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struct irdma_cqp_request *cqp_request);
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void irdma_put_cqp_request(struct irdma_cqp *cqp,
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struct irdma_cqp_request *cqp_request);
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int irdma_alloc_local_mac_entry(struct irdma_pci_f *rf, u16 *mac_tbl_idx);
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int irdma_add_local_mac_entry(struct irdma_pci_f *rf, const u8 *mac_addr, u16 idx);
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void irdma_del_local_mac_entry(struct irdma_pci_f *rf, u16 idx);
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u32 irdma_initialize_hw_rsrc(struct irdma_pci_f *rf);
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void irdma_port_ibevent(struct irdma_device *iwdev);
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void irdma_cm_disconn(struct irdma_qp *qp);
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bool irdma_cqp_crit_err(struct irdma_sc_dev *dev, u8 cqp_cmd,
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u16 maj_err_code, u16 min_err_code);
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int irdma_handle_cqp_op(struct irdma_pci_f *rf,
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struct irdma_cqp_request *cqp_request);
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int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
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struct ib_udata *udata);
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int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
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int attr_mask, struct ib_udata *udata);
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void irdma_cq_wq_destroy(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
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void irdma_cleanup_pending_cqp_op(struct irdma_pci_f *rf);
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int irdma_hw_modify_qp(struct irdma_device *iwdev, struct irdma_qp *iwqp,
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struct irdma_modify_qp_info *info, bool wait);
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int irdma_qp_suspend_resume(struct irdma_sc_qp *qp, bool suspend);
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int irdma_manage_qhash(struct irdma_device *iwdev, struct irdma_cm_info *cminfo,
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enum irdma_quad_entry_type etype,
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enum irdma_quad_hash_manage_type mtype, void *cmnode,
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bool wait);
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void irdma_receive_ilq(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *rbuf);
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void irdma_free_sqbuf(struct irdma_sc_vsi *vsi, void *bufp);
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void irdma_free_qp_rsrc(struct irdma_qp *iwqp);
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int irdma_setup_cm_core(struct irdma_device *iwdev, u8 ver);
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void irdma_cleanup_cm_core(struct irdma_cm_core *cm_core);
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void irdma_next_iw_state(struct irdma_qp *iwqp, u8 state, u8 del_hash, u8 term,
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u8 term_len);
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int irdma_send_syn(struct irdma_cm_node *cm_node, u32 sendack);
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int irdma_send_reset(struct irdma_cm_node *cm_node);
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struct irdma_cm_node *irdma_find_node(struct irdma_cm_core *cm_core,
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u16 rem_port, u32 *rem_addr, u16 loc_port,
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u32 *loc_addr, u16 vlan_id);
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int irdma_hw_flush_wqes(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
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struct irdma_qp_flush_info *info, bool wait);
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void irdma_gen_ae(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
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struct irdma_gen_ae_info *info, bool wait);
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void irdma_copy_ip_ntohl(u32 *dst, __be32 *src);
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void irdma_copy_ip_htonl(__be32 *dst, u32 *src);
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u16 irdma_get_vlan_ipv4(u32 *addr);
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struct net_device *irdma_netdev_vlan_ipv6(u32 *addr, u16 *vlan_id, u8 *mac);
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struct ib_mr *irdma_reg_phys_mr(struct ib_pd *ib_pd, u64 addr, u64 size,
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int acc, u64 *iova_start);
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int irdma_upload_qp_context(struct irdma_qp *iwqp, bool freeze, bool raw);
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void irdma_cqp_ce_handler(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
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int irdma_ah_cqp_op(struct irdma_pci_f *rf, struct irdma_sc_ah *sc_ah, u8 cmd,
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bool wait,
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void (*callback_fcn)(struct irdma_cqp_request *cqp_request),
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void *cb_param);
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void irdma_gsi_ud_qp_ah_cb(struct irdma_cqp_request *cqp_request);
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bool irdma_cq_empty(struct irdma_cq *iwcq);
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int irdma_inetaddr_event(struct notifier_block *notifier, unsigned long event,
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void *ptr);
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int irdma_inet6addr_event(struct notifier_block *notifier, unsigned long event,
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void *ptr);
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int irdma_net_event(struct notifier_block *notifier, unsigned long event,
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void *ptr);
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int irdma_netdevice_event(struct notifier_block *notifier, unsigned long event,
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void *ptr);
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void irdma_add_ip(struct irdma_device *iwdev);
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void cqp_compl_worker(struct work_struct *work);
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#endif /* IRDMA_MAIN_H */
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