422 lines
12 KiB
C
422 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <media/drv-intf/saa7146_vv.h>
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static u32 saa7146_i2c_func(struct i2c_adapter *adapter)
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{
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/* DEB_I2C("'%s'\n", adapter->name); */
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return I2C_FUNC_I2C
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| I2C_FUNC_SMBUS_QUICK
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| I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE
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| I2C_FUNC_SMBUS_READ_BYTE_DATA | I2C_FUNC_SMBUS_WRITE_BYTE_DATA;
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}
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/* this function returns the status-register of our i2c-device */
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static inline u32 saa7146_i2c_status(struct saa7146_dev *dev)
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{
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u32 iicsta = saa7146_read(dev, I2C_STATUS);
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/* DEB_I2C("status: 0x%08x\n", iicsta); */
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return iicsta;
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}
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/* this function runs through the i2c-messages and prepares the data to be
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sent through the saa7146. have a look at the specifications p. 122 ff
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to understand this. it returns the number of u32s to send, or -1
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in case of an error. */
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static int saa7146_i2c_msg_prepare(const struct i2c_msg *m, int num, __le32 *op)
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{
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int h1, h2;
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int i, j, addr;
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int mem = 0, op_count = 0;
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/* first determine size of needed memory */
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for(i = 0; i < num; i++) {
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mem += m[i].len + 1;
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}
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/* worst case: we need one u32 for three bytes to be send
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plus one extra byte to address the device */
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mem = 1 + ((mem-1) / 3);
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/* we assume that op points to a memory of at least
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* SAA7146_I2C_MEM bytes size. if we exceed this limit...
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*/
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if ((4 * mem) > SAA7146_I2C_MEM) {
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/* DEB_I2C("cannot prepare i2c-message\n"); */
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return -ENOMEM;
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}
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/* be careful: clear out the i2c-mem first */
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memset(op,0,sizeof(__le32)*mem);
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/* loop through all messages */
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for(i = 0; i < num; i++) {
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addr = i2c_8bit_addr_from_msg(&m[i]);
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h1 = op_count/3; h2 = op_count%3;
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op[h1] |= cpu_to_le32( (u8)addr << ((3-h2)*8));
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op[h1] |= cpu_to_le32(SAA7146_I2C_START << ((3-h2)*2));
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op_count++;
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/* loop through all bytes of message i */
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for(j = 0; j < m[i].len; j++) {
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/* insert the data bytes */
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h1 = op_count/3; h2 = op_count%3;
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op[h1] |= cpu_to_le32( (u32)((u8)m[i].buf[j]) << ((3-h2)*8));
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op[h1] |= cpu_to_le32( SAA7146_I2C_CONT << ((3-h2)*2));
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op_count++;
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}
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}
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/* have a look at the last byte inserted:
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if it was: ...CONT change it to ...STOP */
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h1 = (op_count-1)/3; h2 = (op_count-1)%3;
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if ( SAA7146_I2C_CONT == (0x3 & (le32_to_cpu(op[h1]) >> ((3-h2)*2))) ) {
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op[h1] &= ~cpu_to_le32(0x2 << ((3-h2)*2));
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op[h1] |= cpu_to_le32(SAA7146_I2C_STOP << ((3-h2)*2));
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}
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/* return the number of u32s to send */
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return mem;
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}
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/* this functions loops through all i2c-messages. normally, it should determine
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which bytes were read through the adapter and write them back to the corresponding
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i2c-message. but instead, we simply write back all bytes.
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fixme: this could be improved. */
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static int saa7146_i2c_msg_cleanup(const struct i2c_msg *m, int num, __le32 *op)
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{
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int i, j;
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int op_count = 0;
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/* loop through all messages */
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for(i = 0; i < num; i++) {
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op_count++;
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/* loop through all bytes of message i */
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for(j = 0; j < m[i].len; j++) {
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/* write back all bytes that could have been read */
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m[i].buf[j] = (le32_to_cpu(op[op_count/3]) >> ((3-(op_count%3))*8));
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op_count++;
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}
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}
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return 0;
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}
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/* this functions resets the i2c-device and returns 0 if everything was fine, otherwise -1 */
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static int saa7146_i2c_reset(struct saa7146_dev *dev)
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{
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/* get current status */
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u32 status = saa7146_i2c_status(dev);
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/* clear registers for sure */
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saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
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saa7146_write(dev, I2C_TRANSFER, 0);
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/* check if any operation is still in progress */
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if ( 0 != ( status & SAA7146_I2C_BUSY) ) {
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/* yes, kill ongoing operation */
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DEB_I2C("busy_state detected\n");
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/* set "ABORT-OPERATION"-bit (bit 7)*/
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saa7146_write(dev, I2C_STATUS, (dev->i2c_bitrate | MASK_07));
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saa7146_write(dev, MC2, (MASK_00 | MASK_16));
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msleep(SAA7146_I2C_DELAY);
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/* clear all error-bits pending; this is needed because p.123, note 1 */
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saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
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saa7146_write(dev, MC2, (MASK_00 | MASK_16));
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msleep(SAA7146_I2C_DELAY);
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}
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/* check if any error is (still) present. (this can be necessary because p.123, note 1) */
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status = saa7146_i2c_status(dev);
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if ( dev->i2c_bitrate != status ) {
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DEB_I2C("error_state detected. status:0x%08x\n", status);
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/* Repeat the abort operation. This seems to be necessary
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after serious protocol errors caused by e.g. the SAA7740 */
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saa7146_write(dev, I2C_STATUS, (dev->i2c_bitrate | MASK_07));
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saa7146_write(dev, MC2, (MASK_00 | MASK_16));
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msleep(SAA7146_I2C_DELAY);
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/* clear all error-bits pending */
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saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
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saa7146_write(dev, MC2, (MASK_00 | MASK_16));
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msleep(SAA7146_I2C_DELAY);
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/* the data sheet says it might be necessary to clear the status
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twice after an abort */
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saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
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saa7146_write(dev, MC2, (MASK_00 | MASK_16));
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msleep(SAA7146_I2C_DELAY);
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}
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/* if any error is still present, a fatal error has occurred ... */
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status = saa7146_i2c_status(dev);
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if ( dev->i2c_bitrate != status ) {
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DEB_I2C("fatal error. status:0x%08x\n", status);
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return -1;
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}
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return 0;
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}
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/* this functions writes out the data-byte 'dword' to the i2c-device.
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it returns 0 if ok, -1 if the transfer failed, -2 if the transfer
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failed badly (e.g. address error) */
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static int saa7146_i2c_writeout(struct saa7146_dev *dev, __le32 *dword, int short_delay)
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{
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u32 status = 0, mc2 = 0;
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int trial = 0;
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unsigned long timeout;
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/* write out i2c-command */
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DEB_I2C("before: 0x%08x (status: 0x%08x), %d\n",
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*dword, saa7146_read(dev, I2C_STATUS), dev->i2c_op);
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if( 0 != (SAA7146_USE_I2C_IRQ & dev->ext->flags)) {
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saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
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saa7146_write(dev, I2C_TRANSFER, le32_to_cpu(*dword));
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dev->i2c_op = 1;
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SAA7146_ISR_CLEAR(dev, MASK_16|MASK_17);
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SAA7146_IER_ENABLE(dev, MASK_16|MASK_17);
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saa7146_write(dev, MC2, (MASK_00 | MASK_16));
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timeout = HZ/100 + 1; /* 10ms */
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timeout = wait_event_interruptible_timeout(dev->i2c_wq, dev->i2c_op == 0, timeout);
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if (timeout == -ERESTARTSYS || dev->i2c_op) {
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SAA7146_IER_DISABLE(dev, MASK_16|MASK_17);
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SAA7146_ISR_CLEAR(dev, MASK_16|MASK_17);
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if (timeout == -ERESTARTSYS)
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/* a signal arrived */
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return -ERESTARTSYS;
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pr_warn("%s %s [irq]: timed out waiting for end of xfer\n",
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dev->name, __func__);
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return -EIO;
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}
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status = saa7146_read(dev, I2C_STATUS);
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} else {
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saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
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saa7146_write(dev, I2C_TRANSFER, le32_to_cpu(*dword));
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saa7146_write(dev, MC2, (MASK_00 | MASK_16));
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/* do not poll for i2c-status before upload is complete */
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timeout = jiffies + HZ/100 + 1; /* 10ms */
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while(1) {
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mc2 = (saa7146_read(dev, MC2) & 0x1);
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if( 0 != mc2 ) {
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break;
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}
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if (time_after(jiffies,timeout)) {
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pr_warn("%s %s: timed out waiting for MC2\n",
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dev->name, __func__);
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return -EIO;
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}
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}
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/* wait until we get a transfer done or error */
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timeout = jiffies + HZ/100 + 1; /* 10ms */
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/* first read usually delivers bogus results... */
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saa7146_i2c_status(dev);
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while(1) {
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status = saa7146_i2c_status(dev);
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if ((status & 0x3) != 1)
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break;
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if (time_after(jiffies,timeout)) {
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/* this is normal when probing the bus
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* (no answer from nonexisistant device...)
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*/
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pr_warn("%s %s [poll]: timed out waiting for end of xfer\n",
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dev->name, __func__);
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return -EIO;
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}
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if (++trial < 50 && short_delay)
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udelay(10);
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else
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msleep(1);
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}
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}
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/* give a detailed status report */
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if ( 0 != (status & (SAA7146_I2C_SPERR | SAA7146_I2C_APERR |
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SAA7146_I2C_DTERR | SAA7146_I2C_DRERR |
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SAA7146_I2C_AL | SAA7146_I2C_ERR |
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SAA7146_I2C_BUSY)) ) {
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if ( 0 == (status & SAA7146_I2C_ERR) ||
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0 == (status & SAA7146_I2C_BUSY) ) {
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/* it may take some time until ERR goes high - ignore */
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DEB_I2C("unexpected i2c status %04x\n", status);
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}
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if( 0 != (status & SAA7146_I2C_SPERR) ) {
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DEB_I2C("error due to invalid start/stop condition\n");
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}
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if( 0 != (status & SAA7146_I2C_DTERR) ) {
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DEB_I2C("error in data transmission\n");
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}
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if( 0 != (status & SAA7146_I2C_DRERR) ) {
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DEB_I2C("error when receiving data\n");
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}
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if( 0 != (status & SAA7146_I2C_AL) ) {
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DEB_I2C("error because arbitration lost\n");
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}
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/* we handle address-errors here */
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if( 0 != (status & SAA7146_I2C_APERR) ) {
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DEB_I2C("error in address phase\n");
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return -EREMOTEIO;
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}
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return -EIO;
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}
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/* read back data, just in case we were reading ... */
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*dword = cpu_to_le32(saa7146_read(dev, I2C_TRANSFER));
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DEB_I2C("after: 0x%08x\n", *dword);
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return 0;
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}
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static int saa7146_i2c_transfer(struct saa7146_dev *dev, const struct i2c_msg *msgs, int num, int retries)
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{
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int i = 0, count = 0;
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__le32 *buffer = dev->d_i2c.cpu_addr;
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int err = 0;
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int short_delay = 0;
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if (mutex_lock_interruptible(&dev->i2c_lock))
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return -ERESTARTSYS;
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for(i=0;i<num;i++) {
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DEB_I2C("msg:%d/%d\n", i+1, num);
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}
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/* prepare the message(s), get number of u32s to transfer */
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count = saa7146_i2c_msg_prepare(msgs, num, buffer);
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if ( 0 > count ) {
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err = -EIO;
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goto out;
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}
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if ( count > 3 || 0 != (SAA7146_I2C_SHORT_DELAY & dev->ext->flags) )
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short_delay = 1;
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do {
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/* reset the i2c-device if necessary */
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err = saa7146_i2c_reset(dev);
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if ( 0 > err ) {
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DEB_I2C("could not reset i2c-device\n");
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goto out;
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}
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/* write out the u32s one after another */
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for(i = 0; i < count; i++) {
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err = saa7146_i2c_writeout(dev, &buffer[i], short_delay);
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if ( 0 != err) {
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/* this one is unsatisfying: some i2c slaves on some
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dvb cards don't acknowledge correctly, so the saa7146
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thinks that an address error occurred. in that case, the
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transaction should be retrying, even if an address error
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occurred. analog saa7146 based cards extensively rely on
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i2c address probing, however, and address errors indicate that a
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device is really *not* there. retrying in that case
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increases the time the device needs to probe greatly, so
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it should be avoided. So we bail out in irq mode after an
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address error and trust the saa7146 address error detection. */
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if (-EREMOTEIO == err && 0 != (SAA7146_USE_I2C_IRQ & dev->ext->flags))
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goto out;
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DEB_I2C("error while sending message(s). starting again\n");
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break;
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}
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}
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if( 0 == err ) {
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err = num;
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break;
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}
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/* delay a bit before retrying */
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msleep(10);
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} while (err != num && retries--);
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/* quit if any error occurred */
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if (err != num)
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goto out;
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/* if any things had to be read, get the results */
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if ( 0 != saa7146_i2c_msg_cleanup(msgs, num, buffer)) {
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DEB_I2C("could not cleanup i2c-message\n");
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err = -EIO;
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goto out;
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}
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/* return the number of delivered messages */
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DEB_I2C("transmission successful. (msg:%d)\n", err);
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out:
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/* another bug in revision 0: the i2c-registers get uploaded randomly by other
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uploads, so we better clear them out before continuing */
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if( 0 == dev->revision ) {
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__le32 zero = 0;
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saa7146_i2c_reset(dev);
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if( 0 != saa7146_i2c_writeout(dev, &zero, short_delay)) {
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pr_info("revision 0 error. this should never happen\n");
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}
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}
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mutex_unlock(&dev->i2c_lock);
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return err;
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}
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/* utility functions */
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static int saa7146_i2c_xfer(struct i2c_adapter* adapter, struct i2c_msg *msg, int num)
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{
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struct v4l2_device *v4l2_dev = i2c_get_adapdata(adapter);
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struct saa7146_dev *dev = to_saa7146_dev(v4l2_dev);
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/* use helper function to transfer data */
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return saa7146_i2c_transfer(dev, msg, num, adapter->retries);
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}
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/*****************************************************************************/
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/* i2c-adapter helper functions */
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/* exported algorithm data */
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static const struct i2c_algorithm saa7146_algo = {
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.master_xfer = saa7146_i2c_xfer,
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.functionality = saa7146_i2c_func,
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};
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int saa7146_i2c_adapter_prepare(struct saa7146_dev *dev, struct i2c_adapter *i2c_adapter, u32 bitrate)
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{
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DEB_EE("bitrate: 0x%08x\n", bitrate);
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/* enable i2c-port pins */
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saa7146_write(dev, MC1, (MASK_08 | MASK_24));
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dev->i2c_bitrate = bitrate;
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saa7146_i2c_reset(dev);
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if (i2c_adapter) {
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i2c_set_adapdata(i2c_adapter, &dev->v4l2_dev);
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i2c_adapter->dev.parent = &dev->pci->dev;
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i2c_adapter->algo = &saa7146_algo;
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i2c_adapter->algo_data = NULL;
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i2c_adapter->timeout = SAA7146_I2C_TIMEOUT;
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i2c_adapter->retries = SAA7146_I2C_RETRIES;
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}
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return 0;
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}
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