629 lines
14 KiB
C
629 lines
14 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Marvell RVU Admin Function driver
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*
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* Copyright (C) 2018 Marvell.
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*
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*/
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#ifndef NPC_H
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#define NPC_H
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#define NPC_KEX_CHAN_MASK 0xFFFULL
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#define SET_KEX_LD(intf, lid, ltype, ld, cfg) \
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rvu_write64(rvu, blkaddr, \
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NPC_AF_INTFX_LIDX_LTX_LDX_CFG(intf, lid, ltype, ld), cfg)
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#define SET_KEX_LDFLAGS(intf, ld, flags, cfg) \
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rvu_write64(rvu, blkaddr, \
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NPC_AF_INTFX_LDATAX_FLAGSX_CFG(intf, ld, flags), cfg)
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enum NPC_LID_E {
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NPC_LID_LA = 0,
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NPC_LID_LB,
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NPC_LID_LC,
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NPC_LID_LD,
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NPC_LID_LE,
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NPC_LID_LF,
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NPC_LID_LG,
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NPC_LID_LH,
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};
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#define NPC_LT_NA 0
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enum npc_kpu_la_ltype {
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NPC_LT_LA_8023 = 1,
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NPC_LT_LA_ETHER,
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NPC_LT_LA_IH_NIX_ETHER,
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NPC_LT_LA_HIGIG2_ETHER = 7,
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NPC_LT_LA_IH_NIX_HIGIG2_ETHER,
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NPC_LT_LA_CUSTOM_L2_90B_ETHER,
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NPC_LT_LA_CPT_HDR,
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NPC_LT_LA_CUSTOM_L2_24B_ETHER,
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NPC_LT_LA_CUSTOM_PRE_L2_ETHER,
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NPC_LT_LA_CUSTOM0 = 0xE,
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NPC_LT_LA_CUSTOM1 = 0xF,
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};
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enum npc_kpu_lb_ltype {
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NPC_LT_LB_ETAG = 1,
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NPC_LT_LB_CTAG,
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NPC_LT_LB_STAG_QINQ,
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NPC_LT_LB_BTAG,
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NPC_LT_LB_PPPOE,
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NPC_LT_LB_DSA,
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NPC_LT_LB_DSA_VLAN,
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NPC_LT_LB_EDSA,
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NPC_LT_LB_EDSA_VLAN,
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NPC_LT_LB_EXDSA,
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NPC_LT_LB_EXDSA_VLAN,
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NPC_LT_LB_FDSA,
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NPC_LT_LB_VLAN_EXDSA,
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NPC_LT_LB_CUSTOM0 = 0xE,
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NPC_LT_LB_CUSTOM1 = 0xF,
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};
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enum npc_kpu_lc_ltype {
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NPC_LT_LC_IP = 1,
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NPC_LT_LC_IP_OPT,
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NPC_LT_LC_IP6,
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NPC_LT_LC_IP6_EXT,
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NPC_LT_LC_ARP,
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NPC_LT_LC_RARP,
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NPC_LT_LC_MPLS,
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NPC_LT_LC_NSH,
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NPC_LT_LC_PTP,
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NPC_LT_LC_FCOE,
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NPC_LT_LC_NGIO,
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NPC_LT_LC_CUSTOM0 = 0xE,
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NPC_LT_LC_CUSTOM1 = 0xF,
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};
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/* Don't modify Ltypes upto SCTP, otherwise it will
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* effect flow tag calculation and thus RSS.
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*/
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enum npc_kpu_ld_ltype {
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NPC_LT_LD_TCP = 1,
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NPC_LT_LD_UDP,
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NPC_LT_LD_ICMP,
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NPC_LT_LD_SCTP,
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NPC_LT_LD_ICMP6,
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NPC_LT_LD_CUSTOM0,
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NPC_LT_LD_CUSTOM1,
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NPC_LT_LD_IGMP = 8,
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NPC_LT_LD_AH,
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NPC_LT_LD_GRE,
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NPC_LT_LD_NVGRE,
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NPC_LT_LD_NSH,
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NPC_LT_LD_TU_MPLS_IN_NSH,
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NPC_LT_LD_TU_MPLS_IN_IP,
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};
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enum npc_kpu_le_ltype {
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NPC_LT_LE_VXLAN = 1,
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NPC_LT_LE_GENEVE,
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NPC_LT_LE_ESP,
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NPC_LT_LE_GTPU = 4,
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NPC_LT_LE_VXLANGPE,
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NPC_LT_LE_GTPC,
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NPC_LT_LE_NSH,
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NPC_LT_LE_TU_MPLS_IN_GRE,
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NPC_LT_LE_TU_NSH_IN_GRE,
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NPC_LT_LE_TU_MPLS_IN_UDP,
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NPC_LT_LE_CUSTOM0 = 0xE,
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NPC_LT_LE_CUSTOM1 = 0xF,
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};
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enum npc_kpu_lf_ltype {
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NPC_LT_LF_TU_ETHER = 1,
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NPC_LT_LF_TU_PPP,
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NPC_LT_LF_TU_MPLS_IN_VXLANGPE,
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NPC_LT_LF_TU_NSH_IN_VXLANGPE,
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NPC_LT_LF_TU_MPLS_IN_NSH,
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NPC_LT_LF_TU_3RD_NSH,
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NPC_LT_LF_CUSTOM0 = 0xE,
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NPC_LT_LF_CUSTOM1 = 0xF,
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};
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enum npc_kpu_lg_ltype {
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NPC_LT_LG_TU_IP = 1,
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NPC_LT_LG_TU_IP6,
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NPC_LT_LG_TU_ARP,
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NPC_LT_LG_TU_ETHER_IN_NSH,
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NPC_LT_LG_CUSTOM0 = 0xE,
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NPC_LT_LG_CUSTOM1 = 0xF,
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};
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/* Don't modify Ltypes upto SCTP, otherwise it will
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* effect flow tag calculation and thus RSS.
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*/
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enum npc_kpu_lh_ltype {
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NPC_LT_LH_TU_TCP = 1,
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NPC_LT_LH_TU_UDP,
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NPC_LT_LH_TU_ICMP,
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NPC_LT_LH_TU_SCTP,
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NPC_LT_LH_TU_ICMP6,
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NPC_LT_LH_TU_IGMP = 8,
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NPC_LT_LH_TU_ESP,
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NPC_LT_LH_TU_AH,
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NPC_LT_LH_CUSTOM0 = 0xE,
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NPC_LT_LH_CUSTOM1 = 0xF,
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};
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/* NPC port kind defines how the incoming or outgoing packets
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* are processed. NPC accepts packets from up to 64 pkinds.
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* Software assigns pkind for each incoming port such as CGX
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* Ethernet interfaces, LBK interfaces, etc.
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*/
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#define NPC_UNRESERVED_PKIND_COUNT NPC_RX_CUSTOM_PRE_L2_PKIND
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enum npc_pkind_type {
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NPC_RX_LBK_PKIND = 0ULL,
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NPC_RX_CUSTOM_PRE_L2_PKIND = 55ULL,
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NPC_RX_VLAN_EXDSA_PKIND = 56ULL,
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NPC_RX_CHLEN24B_PKIND = 57ULL,
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NPC_RX_CPT_HDR_PKIND,
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NPC_RX_CHLEN90B_PKIND,
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NPC_TX_HIGIG_PKIND,
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NPC_RX_HIGIG_PKIND,
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NPC_RX_EDSA_PKIND,
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NPC_TX_DEF_PKIND, /* NIX-TX PKIND */
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};
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enum npc_interface_type {
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NPC_INTF_MODE_DEF,
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};
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/* list of known and supported fields in packet header and
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* fields present in key structure.
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*/
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enum key_fields {
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NPC_DMAC,
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NPC_SMAC,
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NPC_ETYPE,
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NPC_VLAN_ETYPE_CTAG, /* 0x8100 */
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NPC_VLAN_ETYPE_STAG, /* 0x88A8 */
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NPC_OUTER_VID,
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NPC_TOS,
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NPC_IPFRAG_IPV4,
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NPC_SIP_IPV4,
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NPC_DIP_IPV4,
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NPC_IPFRAG_IPV6,
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NPC_SIP_IPV6,
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NPC_DIP_IPV6,
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NPC_IPPROTO_TCP,
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NPC_IPPROTO_UDP,
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NPC_IPPROTO_SCTP,
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NPC_IPPROTO_AH,
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NPC_IPPROTO_ESP,
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NPC_IPPROTO_ICMP,
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NPC_IPPROTO_ICMP6,
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NPC_SPORT_TCP,
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NPC_DPORT_TCP,
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NPC_SPORT_UDP,
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NPC_DPORT_UDP,
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NPC_SPORT_SCTP,
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NPC_DPORT_SCTP,
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NPC_HEADER_FIELDS_MAX,
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NPC_CHAN = NPC_HEADER_FIELDS_MAX, /* Valid when Rx */
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NPC_PF_FUNC, /* Valid when Tx */
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NPC_ERRLEV,
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NPC_ERRCODE,
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NPC_LXMB,
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NPC_EXACT_RESULT,
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NPC_LA,
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NPC_LB,
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NPC_LC,
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NPC_LD,
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NPC_LE,
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NPC_LF,
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NPC_LG,
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NPC_LH,
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/* Ethertype for untagged frame */
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NPC_ETYPE_ETHER,
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/* Ethertype for single tagged frame */
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NPC_ETYPE_TAG1,
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/* Ethertype for double tagged frame */
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NPC_ETYPE_TAG2,
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/* outer vlan tci for single tagged frame */
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NPC_VLAN_TAG1,
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/* outer vlan tci for double tagged frame */
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NPC_VLAN_TAG2,
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/* other header fields programmed to extract but not of our interest */
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NPC_UNKNOWN,
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NPC_KEY_FIELDS_MAX,
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};
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struct npc_kpu_profile_cam {
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u8 state;
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u8 state_mask;
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u16 dp0;
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u16 dp0_mask;
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u16 dp1;
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u16 dp1_mask;
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u16 dp2;
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u16 dp2_mask;
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} __packed;
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struct npc_kpu_profile_action {
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u8 errlev;
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u8 errcode;
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u8 dp0_offset;
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u8 dp1_offset;
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u8 dp2_offset;
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u8 bypass_count;
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u8 parse_done;
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u8 next_state;
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u8 ptr_advance;
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u8 cap_ena;
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u8 lid;
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u8 ltype;
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u8 flags;
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u8 offset;
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u8 mask;
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u8 right;
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u8 shift;
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} __packed;
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struct npc_kpu_profile {
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int cam_entries;
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int action_entries;
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struct npc_kpu_profile_cam *cam;
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struct npc_kpu_profile_action *action;
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};
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/* NPC KPU register formats */
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struct npc_kpu_cam {
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#if defined(__BIG_ENDIAN_BITFIELD)
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u64 rsvd_63_56 : 8;
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u64 state : 8;
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u64 dp2_data : 16;
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u64 dp1_data : 16;
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u64 dp0_data : 16;
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#else
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u64 dp0_data : 16;
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u64 dp1_data : 16;
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u64 dp2_data : 16;
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u64 state : 8;
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u64 rsvd_63_56 : 8;
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#endif
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};
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struct npc_kpu_action0 {
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#if defined(__BIG_ENDIAN_BITFIELD)
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u64 rsvd_63_57 : 7;
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u64 byp_count : 3;
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u64 capture_ena : 1;
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u64 parse_done : 1;
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u64 next_state : 8;
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u64 rsvd_43 : 1;
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u64 capture_lid : 3;
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u64 capture_ltype : 4;
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u64 capture_flags : 8;
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u64 ptr_advance : 8;
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u64 var_len_offset : 8;
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u64 var_len_mask : 8;
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u64 var_len_right : 1;
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u64 var_len_shift : 3;
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#else
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u64 var_len_shift : 3;
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u64 var_len_right : 1;
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u64 var_len_mask : 8;
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u64 var_len_offset : 8;
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u64 ptr_advance : 8;
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u64 capture_flags : 8;
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u64 capture_ltype : 4;
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u64 capture_lid : 3;
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u64 rsvd_43 : 1;
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u64 next_state : 8;
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u64 parse_done : 1;
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u64 capture_ena : 1;
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u64 byp_count : 3;
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u64 rsvd_63_57 : 7;
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#endif
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};
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struct npc_kpu_action1 {
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#if defined(__BIG_ENDIAN_BITFIELD)
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u64 rsvd_63_36 : 28;
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u64 errlev : 4;
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u64 errcode : 8;
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u64 dp2_offset : 8;
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u64 dp1_offset : 8;
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u64 dp0_offset : 8;
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#else
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u64 dp0_offset : 8;
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u64 dp1_offset : 8;
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u64 dp2_offset : 8;
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u64 errcode : 8;
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u64 errlev : 4;
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u64 rsvd_63_36 : 28;
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#endif
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};
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struct npc_kpu_pkind_cpi_def {
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#if defined(__BIG_ENDIAN_BITFIELD)
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u64 ena : 1;
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u64 rsvd_62_59 : 4;
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u64 lid : 3;
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u64 ltype_match : 4;
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u64 ltype_mask : 4;
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u64 flags_match : 8;
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u64 flags_mask : 8;
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u64 add_offset : 8;
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u64 add_mask : 8;
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u64 rsvd_15 : 1;
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u64 add_shift : 3;
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u64 rsvd_11_10 : 2;
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u64 cpi_base : 10;
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#else
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u64 cpi_base : 10;
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u64 rsvd_11_10 : 2;
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u64 add_shift : 3;
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u64 rsvd_15 : 1;
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u64 add_mask : 8;
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u64 add_offset : 8;
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u64 flags_mask : 8;
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u64 flags_match : 8;
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u64 ltype_mask : 4;
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u64 ltype_match : 4;
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u64 lid : 3;
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u64 rsvd_62_59 : 4;
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u64 ena : 1;
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#endif
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};
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struct nix_rx_action {
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#if defined(__BIG_ENDIAN_BITFIELD)
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u64 rsvd_63_61 :3;
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u64 flow_key_alg :5;
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u64 match_id :16;
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u64 index :20;
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u64 pf_func :16;
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u64 op :4;
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#else
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u64 op :4;
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u64 pf_func :16;
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u64 index :20;
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u64 match_id :16;
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u64 flow_key_alg :5;
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u64 rsvd_63_61 :3;
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#endif
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};
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/* NPC_AF_INTFX_KEX_CFG field masks */
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#define NPC_EXACT_NIBBLE_START 40
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#define NPC_EXACT_NIBBLE_END 43
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#define NPC_EXACT_NIBBLE GENMASK_ULL(43, 40)
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/* NPC_EXACT_KEX_S nibble definitions for each field */
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#define NPC_EXACT_NIBBLE_HIT BIT_ULL(40)
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#define NPC_EXACT_NIBBLE_OPC BIT_ULL(40)
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#define NPC_EXACT_NIBBLE_WAY BIT_ULL(40)
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#define NPC_EXACT_NIBBLE_INDEX GENMASK_ULL(43, 41)
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#define NPC_EXACT_RESULT_HIT BIT_ULL(0)
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#define NPC_EXACT_RESULT_OPC GENMASK_ULL(2, 1)
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#define NPC_EXACT_RESULT_WAY GENMASK_ULL(4, 3)
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#define NPC_EXACT_RESULT_IDX GENMASK_ULL(15, 5)
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/* NPC_AF_INTFX_KEX_CFG field masks */
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#define NPC_PARSE_NIBBLE GENMASK_ULL(30, 0)
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/* NPC_PARSE_KEX_S nibble definitions for each field */
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#define NPC_PARSE_NIBBLE_CHAN GENMASK_ULL(2, 0)
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#define NPC_PARSE_NIBBLE_ERRLEV BIT_ULL(3)
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#define NPC_PARSE_NIBBLE_ERRCODE GENMASK_ULL(5, 4)
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#define NPC_PARSE_NIBBLE_L2L3_BCAST BIT_ULL(6)
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#define NPC_PARSE_NIBBLE_LA_FLAGS GENMASK_ULL(8, 7)
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#define NPC_PARSE_NIBBLE_LA_LTYPE BIT_ULL(9)
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#define NPC_PARSE_NIBBLE_LB_FLAGS GENMASK_ULL(11, 10)
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#define NPC_PARSE_NIBBLE_LB_LTYPE BIT_ULL(12)
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#define NPC_PARSE_NIBBLE_LC_FLAGS GENMASK_ULL(14, 13)
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#define NPC_PARSE_NIBBLE_LC_LTYPE BIT_ULL(15)
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#define NPC_PARSE_NIBBLE_LD_FLAGS GENMASK_ULL(17, 16)
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#define NPC_PARSE_NIBBLE_LD_LTYPE BIT_ULL(18)
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#define NPC_PARSE_NIBBLE_LE_FLAGS GENMASK_ULL(20, 19)
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#define NPC_PARSE_NIBBLE_LE_LTYPE BIT_ULL(21)
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#define NPC_PARSE_NIBBLE_LF_FLAGS GENMASK_ULL(23, 22)
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#define NPC_PARSE_NIBBLE_LF_LTYPE BIT_ULL(24)
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#define NPC_PARSE_NIBBLE_LG_FLAGS GENMASK_ULL(26, 25)
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#define NPC_PARSE_NIBBLE_LG_LTYPE BIT_ULL(27)
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#define NPC_PARSE_NIBBLE_LH_FLAGS GENMASK_ULL(29, 28)
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#define NPC_PARSE_NIBBLE_LH_LTYPE BIT_ULL(30)
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struct nix_tx_action {
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#if defined(__BIG_ENDIAN_BITFIELD)
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u64 rsvd_63_48 :16;
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u64 match_id :16;
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u64 index :20;
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u64 rsvd_11_8 :8;
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u64 op :4;
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#else
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u64 op :4;
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u64 rsvd_11_8 :8;
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u64 index :20;
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u64 match_id :16;
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u64 rsvd_63_48 :16;
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#endif
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};
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/* NIX Receive Vtag Action Structure */
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#define RX_VTAG0_VALID_BIT BIT_ULL(15)
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#define RX_VTAG0_TYPE_MASK GENMASK_ULL(14, 12)
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#define RX_VTAG0_LID_MASK GENMASK_ULL(10, 8)
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#define RX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0)
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#define RX_VTAG1_VALID_BIT BIT_ULL(47)
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#define RX_VTAG1_TYPE_MASK GENMASK_ULL(46, 44)
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#define RX_VTAG1_LID_MASK GENMASK_ULL(42, 40)
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#define RX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32)
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/* NIX Transmit Vtag Action Structure */
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#define TX_VTAG0_DEF_MASK GENMASK_ULL(25, 16)
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#define TX_VTAG0_OP_MASK GENMASK_ULL(13, 12)
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#define TX_VTAG0_LID_MASK GENMASK_ULL(10, 8)
|
|
#define TX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0)
|
|
#define TX_VTAG1_DEF_MASK GENMASK_ULL(57, 48)
|
|
#define TX_VTAG1_OP_MASK GENMASK_ULL(45, 44)
|
|
#define TX_VTAG1_LID_MASK GENMASK_ULL(42, 40)
|
|
#define TX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32)
|
|
|
|
/* NPC MCAM reserved entry index per nixlf */
|
|
#define NIXLF_UCAST_ENTRY 0
|
|
#define NIXLF_BCAST_ENTRY 1
|
|
#define NIXLF_ALLMULTI_ENTRY 2
|
|
#define NIXLF_PROMISC_ENTRY 3
|
|
|
|
struct npc_coalesced_kpu_prfl {
|
|
#define NPC_SIGN 0x00666f727063706e
|
|
#define NPC_PRFL_NAME "npc_prfls_array"
|
|
#define NPC_NAME_LEN 32
|
|
__le64 signature; /* "npcprof\0" (8 bytes/ASCII characters) */
|
|
u8 name[NPC_NAME_LEN]; /* KPU Profile name */
|
|
u64 version; /* KPU firmware/profile version */
|
|
u8 num_prfl; /* No of NPC profiles. */
|
|
u16 prfl_sz[];
|
|
};
|
|
|
|
struct npc_mcam_kex {
|
|
/* MKEX Profle Header */
|
|
u64 mkex_sign; /* "mcam-kex-profile" (8 bytes/ASCII characters) */
|
|
u8 name[MKEX_NAME_LEN]; /* MKEX Profile name */
|
|
u64 cpu_model; /* Format as profiled by CPU hardware */
|
|
u64 kpu_version; /* KPU firmware/profile version */
|
|
u64 reserved; /* Reserved for extension */
|
|
|
|
/* MKEX Profle Data */
|
|
u64 keyx_cfg[NPC_MAX_INTF]; /* NPC_AF_INTF(0..1)_KEX_CFG */
|
|
/* NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG */
|
|
u64 kex_ld_flags[NPC_MAX_LD];
|
|
/* NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG */
|
|
u64 intf_lid_lt_ld[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT][NPC_MAX_LD];
|
|
/* NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG */
|
|
u64 intf_ld_flags[NPC_MAX_INTF][NPC_MAX_LD][NPC_MAX_LFL];
|
|
} __packed;
|
|
|
|
struct npc_kpu_fwdata {
|
|
int entries;
|
|
/* What follows is:
|
|
* struct npc_kpu_profile_cam[entries];
|
|
* struct npc_kpu_profile_action[entries];
|
|
*/
|
|
u8 data[];
|
|
} __packed;
|
|
|
|
struct npc_lt_def {
|
|
u8 ltype_mask;
|
|
u8 ltype_match;
|
|
u8 lid;
|
|
};
|
|
|
|
struct npc_lt_def_ipsec {
|
|
u8 ltype_mask;
|
|
u8 ltype_match;
|
|
u8 lid;
|
|
u8 spi_offset;
|
|
u8 spi_nz;
|
|
};
|
|
|
|
struct npc_lt_def_apad {
|
|
u8 ltype_mask;
|
|
u8 ltype_match;
|
|
u8 lid;
|
|
u8 valid;
|
|
} __packed;
|
|
|
|
struct npc_lt_def_color {
|
|
u8 ltype_mask;
|
|
u8 ltype_match;
|
|
u8 lid;
|
|
u8 noffset;
|
|
u8 offset;
|
|
} __packed;
|
|
|
|
struct npc_lt_def_et {
|
|
u8 ltype_mask;
|
|
u8 ltype_match;
|
|
u8 lid;
|
|
u8 valid;
|
|
u8 offset;
|
|
} __packed;
|
|
|
|
struct npc_lt_def_cfg {
|
|
struct npc_lt_def rx_ol2;
|
|
struct npc_lt_def rx_oip4;
|
|
struct npc_lt_def rx_iip4;
|
|
struct npc_lt_def rx_oip6;
|
|
struct npc_lt_def rx_iip6;
|
|
struct npc_lt_def rx_otcp;
|
|
struct npc_lt_def rx_itcp;
|
|
struct npc_lt_def rx_oudp;
|
|
struct npc_lt_def rx_iudp;
|
|
struct npc_lt_def rx_osctp;
|
|
struct npc_lt_def rx_isctp;
|
|
struct npc_lt_def_ipsec rx_ipsec[2];
|
|
struct npc_lt_def pck_ol2;
|
|
struct npc_lt_def pck_oip4;
|
|
struct npc_lt_def pck_oip6;
|
|
struct npc_lt_def pck_iip4;
|
|
struct npc_lt_def_apad rx_apad0;
|
|
struct npc_lt_def_apad rx_apad1;
|
|
struct npc_lt_def_color ovlan;
|
|
struct npc_lt_def_color ivlan;
|
|
struct npc_lt_def_color rx_gen0_color;
|
|
struct npc_lt_def_color rx_gen1_color;
|
|
struct npc_lt_def_et rx_et[2];
|
|
} __packed;
|
|
|
|
/* Loadable KPU profile firmware data */
|
|
struct npc_kpu_profile_fwdata {
|
|
#define KPU_SIGN 0x00666f727075706b
|
|
#define KPU_NAME_LEN 32
|
|
/** Maximum number of custom KPU entries supported by the built-in profile. */
|
|
#define KPU_MAX_CST_ENT 6
|
|
/* KPU Profle Header */
|
|
__le64 signature; /* "kpuprof\0" (8 bytes/ASCII characters) */
|
|
u8 name[KPU_NAME_LEN]; /* KPU Profile name */
|
|
__le64 version; /* KPU profile version */
|
|
u8 kpus;
|
|
u8 reserved[7];
|
|
|
|
/* Default MKEX profile to be used with this KPU profile. May be
|
|
* overridden with mkex_profile module parameter. Format is same as for
|
|
* the MKEX profile to streamline processing.
|
|
*/
|
|
struct npc_mcam_kex mkex;
|
|
/* LTYPE values for specific HW offloaded protocols. */
|
|
struct npc_lt_def_cfg lt_def;
|
|
/* Dynamically sized data:
|
|
* Custom KPU CAM and ACTION configuration entries.
|
|
* struct npc_kpu_fwdata kpu[kpus];
|
|
*/
|
|
u8 data[];
|
|
} __packed;
|
|
|
|
struct rvu_npc_mcam_rule {
|
|
struct flow_msg packet;
|
|
struct flow_msg mask;
|
|
u8 intf;
|
|
union {
|
|
struct nix_tx_action tx_action;
|
|
struct nix_rx_action rx_action;
|
|
};
|
|
u64 vtag_action;
|
|
struct list_head list;
|
|
u64 features;
|
|
u16 owner;
|
|
u16 entry;
|
|
u16 cntr;
|
|
bool has_cntr;
|
|
u8 default_rule;
|
|
bool enable;
|
|
bool vfvlan_cfg;
|
|
u16 chan;
|
|
u16 chan_mask;
|
|
u8 lxmb;
|
|
};
|
|
|
|
#endif /* NPC_H */
|