516 lines
15 KiB
C
516 lines
15 KiB
C
/*
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* Linux driver for VMware's vmxnet3 ethernet NIC.
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*
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* Copyright (C) 2008-2022, VMware, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; version 2 of the License and no later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* The full GNU General Public License is included in this distribution in
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* the file called "COPYING".
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*
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* Maintained by: pv-drivers@vmware.com
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*
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*/
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#ifndef _VMXNET3_INT_H
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#define _VMXNET3_INT_H
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#include <linux/bitops.h>
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#include <linux/ethtool.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/pci.h>
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#include <linux/compiler.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/ioport.h>
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#include <linux/highmem.h>
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#include <linux/timer.h>
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#include <linux/skbuff.h>
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#include <linux/interrupt.h>
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#include <linux/workqueue.h>
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#include <linux/uaccess.h>
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#include <asm/dma.h>
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#include <asm/page.h>
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#include <linux/tcp.h>
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#include <linux/udp.h>
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#include <linux/ip.h>
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#include <linux/ipv6.h>
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#include <linux/in.h>
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#include <linux/etherdevice.h>
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#include <asm/checksum.h>
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#include <linux/if_vlan.h>
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#include <linux/if_arp.h>
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#include <linux/inetdevice.h>
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#include <linux/log2.h>
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#include "vmxnet3_defs.h"
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#ifdef DEBUG
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# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI(debug)"
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#else
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# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI"
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#endif
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/*
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* Version numbers
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*/
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#define VMXNET3_DRIVER_VERSION_STRING "1.7.0.0-k"
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/* Each byte of this 32-bit integer encodes a version number in
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* VMXNET3_DRIVER_VERSION_STRING.
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*/
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#define VMXNET3_DRIVER_VERSION_NUM 0x01070000
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#if defined(CONFIG_PCI_MSI)
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/* RSS only makes sense if MSI-X is supported. */
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#define VMXNET3_RSS
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#endif
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#define VMXNET3_REV_7 6 /* Vmxnet3 Rev. 7 */
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#define VMXNET3_REV_6 5 /* Vmxnet3 Rev. 6 */
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#define VMXNET3_REV_5 4 /* Vmxnet3 Rev. 5 */
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#define VMXNET3_REV_4 3 /* Vmxnet3 Rev. 4 */
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#define VMXNET3_REV_3 2 /* Vmxnet3 Rev. 3 */
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#define VMXNET3_REV_2 1 /* Vmxnet3 Rev. 2 */
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#define VMXNET3_REV_1 0 /* Vmxnet3 Rev. 1 */
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/*
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* Capabilities
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*/
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enum {
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VMNET_CAP_SG = 0x0001, /* Can do scatter-gather transmits. */
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VMNET_CAP_IP4_CSUM = 0x0002, /* Can checksum only TCP/UDP over
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* IPv4 */
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VMNET_CAP_HW_CSUM = 0x0004, /* Can checksum all packets. */
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VMNET_CAP_HIGH_DMA = 0x0008, /* Can DMA to high memory. */
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VMNET_CAP_TOE = 0x0010, /* Supports TCP/IP offload. */
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VMNET_CAP_TSO = 0x0020, /* Supports TCP Segmentation
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* offload */
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VMNET_CAP_SW_TSO = 0x0040, /* Supports SW TCP Segmentation */
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VMNET_CAP_VMXNET_APROM = 0x0080, /* Vmxnet APROM support */
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VMNET_CAP_HW_TX_VLAN = 0x0100, /* Can we do VLAN tagging in HW */
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VMNET_CAP_HW_RX_VLAN = 0x0200, /* Can we do VLAN untagging in HW */
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VMNET_CAP_SW_VLAN = 0x0400, /* VLAN tagging/untagging in SW */
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VMNET_CAP_WAKE_PCKT_RCV = 0x0800, /* Can wake on network packet recv? */
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VMNET_CAP_ENABLE_INT_INLINE = 0x1000, /* Enable Interrupt Inline */
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VMNET_CAP_ENABLE_HEADER_COPY = 0x2000, /* copy header for vmkernel */
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VMNET_CAP_TX_CHAIN = 0x4000, /* Guest can use multiple tx entries
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* for a pkt */
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VMNET_CAP_RX_CHAIN = 0x8000, /* pkt can span multiple rx entries */
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VMNET_CAP_LPD = 0x10000, /* large pkt delivery */
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VMNET_CAP_BPF = 0x20000, /* BPF Support in VMXNET Virtual HW*/
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VMNET_CAP_SG_SPAN_PAGES = 0x40000, /* Scatter-gather can span multiple*/
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/* pages transmits */
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VMNET_CAP_IP6_CSUM = 0x80000, /* Can do IPv6 csum offload. */
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VMNET_CAP_TSO6 = 0x100000, /* TSO seg. offload for IPv6 pkts. */
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VMNET_CAP_TSO256k = 0x200000, /* Can do TSO seg offload for */
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/* pkts up to 256kB. */
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VMNET_CAP_UPT = 0x400000 /* Support UPT */
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};
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/*
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* Maximum devices supported.
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*/
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#define MAX_ETHERNET_CARDS 10
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#define MAX_PCI_PASSTHRU_DEVICE 6
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struct vmxnet3_cmd_ring {
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union Vmxnet3_GenericDesc *base;
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u32 size;
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u32 next2fill;
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u32 next2comp;
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u8 gen;
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u8 isOutOfOrder;
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dma_addr_t basePA;
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};
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static inline void
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vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring *ring)
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{
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ring->next2fill++;
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if (unlikely(ring->next2fill == ring->size)) {
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ring->next2fill = 0;
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VMXNET3_FLIP_RING_GEN(ring->gen);
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}
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}
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static inline void
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vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring *ring)
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{
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VMXNET3_INC_RING_IDX_ONLY(ring->next2comp, ring->size);
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}
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static inline int
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vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring *ring)
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{
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return (ring->next2comp > ring->next2fill ? 0 : ring->size) +
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ring->next2comp - ring->next2fill - 1;
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}
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struct vmxnet3_comp_ring {
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union Vmxnet3_GenericDesc *base;
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u32 size;
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u32 next2proc;
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u8 gen;
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u8 intr_idx;
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dma_addr_t basePA;
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};
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static inline void
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vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring *ring)
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{
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ring->next2proc++;
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if (unlikely(ring->next2proc == ring->size)) {
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ring->next2proc = 0;
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VMXNET3_FLIP_RING_GEN(ring->gen);
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}
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}
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struct vmxnet3_tx_data_ring {
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struct Vmxnet3_TxDataDesc *base;
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u32 size;
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dma_addr_t basePA;
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};
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enum vmxnet3_buf_map_type {
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VMXNET3_MAP_INVALID = 0,
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VMXNET3_MAP_NONE,
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VMXNET3_MAP_SINGLE,
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VMXNET3_MAP_PAGE,
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};
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struct vmxnet3_tx_buf_info {
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u32 map_type;
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u16 len;
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u16 sop_idx;
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dma_addr_t dma_addr;
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struct sk_buff *skb;
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};
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struct vmxnet3_tq_driver_stats {
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u64 drop_total; /* # of pkts dropped by the driver, the
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* counters below track droppings due to
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* different reasons
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*/
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u64 drop_too_many_frags;
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u64 drop_oversized_hdr;
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u64 drop_hdr_inspect_err;
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u64 drop_tso;
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u64 tx_ring_full;
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u64 linearized; /* # of pkts linearized */
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u64 copy_skb_header; /* # of times we have to copy skb header */
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u64 oversized_hdr;
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};
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struct vmxnet3_tx_ctx {
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bool ipv4;
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bool ipv6;
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u16 mss;
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u32 l4_offset; /* only valid for pkts requesting tso or csum
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* offloading. For encap offload, it refers to
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* inner L4 offset i.e. it includes outer header
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* encap header and inner eth and ip header size
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*/
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u32 l4_hdr_size; /* only valid if mss != 0
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* Refers to inner L4 hdr size for encap
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* offload
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*/
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u32 copy_size; /* # of bytes copied into the data ring */
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union Vmxnet3_GenericDesc *sop_txd;
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union Vmxnet3_GenericDesc *eop_txd;
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};
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struct vmxnet3_tx_queue {
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char name[IFNAMSIZ+8]; /* To identify interrupt */
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struct vmxnet3_adapter *adapter;
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spinlock_t tx_lock;
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struct vmxnet3_cmd_ring tx_ring;
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struct vmxnet3_tx_buf_info *buf_info;
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struct vmxnet3_tx_data_ring data_ring;
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struct vmxnet3_comp_ring comp_ring;
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struct Vmxnet3_TxQueueCtrl *shared;
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struct vmxnet3_tq_driver_stats stats;
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bool stopped;
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int num_stop; /* # of times the queue is
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* stopped */
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int qid;
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u16 txdata_desc_size;
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} __attribute__((__aligned__(SMP_CACHE_BYTES)));
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enum vmxnet3_rx_buf_type {
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VMXNET3_RX_BUF_NONE = 0,
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VMXNET3_RX_BUF_SKB = 1,
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VMXNET3_RX_BUF_PAGE = 2
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};
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#define VMXNET3_RXD_COMP_PENDING 0
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#define VMXNET3_RXD_COMP_DONE 1
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struct vmxnet3_rx_buf_info {
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enum vmxnet3_rx_buf_type buf_type;
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u16 len;
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u8 comp_state;
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union {
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struct sk_buff *skb;
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struct page *page;
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};
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dma_addr_t dma_addr;
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};
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struct vmxnet3_rx_ctx {
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struct sk_buff *skb;
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u32 sop_idx;
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};
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struct vmxnet3_rq_driver_stats {
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u64 drop_total;
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u64 drop_err;
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u64 drop_fcs;
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u64 rx_buf_alloc_failure;
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};
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struct vmxnet3_rx_data_ring {
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Vmxnet3_RxDataDesc *base;
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dma_addr_t basePA;
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u16 desc_size;
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};
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struct vmxnet3_rx_queue {
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char name[IFNAMSIZ + 8]; /* To identify interrupt */
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struct vmxnet3_adapter *adapter;
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struct napi_struct napi;
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struct vmxnet3_cmd_ring rx_ring[2];
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struct vmxnet3_rx_data_ring data_ring;
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struct vmxnet3_comp_ring comp_ring;
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struct vmxnet3_rx_ctx rx_ctx;
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u32 qid; /* rqID in RCD for buffer from 1st ring */
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u32 qid2; /* rqID in RCD for buffer from 2nd ring */
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u32 dataRingQid; /* rqID in RCD for buffer from data ring */
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struct vmxnet3_rx_buf_info *buf_info[2];
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struct Vmxnet3_RxQueueCtrl *shared;
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struct vmxnet3_rq_driver_stats stats;
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} __attribute__((__aligned__(SMP_CACHE_BYTES)));
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#define VMXNET3_DEVICE_MAX_TX_QUEUES 32
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#define VMXNET3_DEVICE_MAX_RX_QUEUES 32 /* Keep this value as a power of 2 */
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#define VMXNET3_DEVICE_DEFAULT_TX_QUEUES 8
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#define VMXNET3_DEVICE_DEFAULT_RX_QUEUES 8 /* Keep this value as a power of 2 */
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/* Should be less than UPT1_RSS_MAX_IND_TABLE_SIZE */
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#define VMXNET3_RSS_IND_TABLE_SIZE (VMXNET3_DEVICE_MAX_RX_QUEUES * 4)
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#define VMXNET3_LINUX_MAX_MSIX_VECT (VMXNET3_DEVICE_MAX_TX_QUEUES + \
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VMXNET3_DEVICE_MAX_RX_QUEUES + 1)
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#define VMXNET3_LINUX_MIN_MSIX_VECT 3 /* 1 for tx, 1 for rx pair and 1 for event */
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struct vmxnet3_intr {
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enum vmxnet3_intr_mask_mode mask_mode;
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enum vmxnet3_intr_type type; /* MSI-X, MSI, or INTx? */
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u8 num_intrs; /* # of intr vectors */
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u8 event_intr_idx; /* idx of the intr vector for event */
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u8 mod_levels[VMXNET3_LINUX_MAX_MSIX_VECT]; /* moderation level */
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char event_msi_vector_name[IFNAMSIZ+17];
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#ifdef CONFIG_PCI_MSI
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struct msix_entry msix_entries[VMXNET3_LINUX_MAX_MSIX_VECT];
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#endif
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};
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/* Interrupt sharing schemes, share_intr */
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#define VMXNET3_INTR_BUDDYSHARE 0 /* Corresponding tx,rx queues share irq */
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#define VMXNET3_INTR_TXSHARE 1 /* All tx queues share one irq */
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#define VMXNET3_INTR_DONTSHARE 2 /* each queue has its own irq */
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#define VMXNET3_STATE_BIT_RESETTING 0
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#define VMXNET3_STATE_BIT_QUIESCED 1
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struct vmxnet3_adapter {
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struct vmxnet3_tx_queue tx_queue[VMXNET3_DEVICE_MAX_TX_QUEUES];
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struct vmxnet3_rx_queue rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES];
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unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
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struct vmxnet3_intr intr;
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spinlock_t cmd_lock;
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struct Vmxnet3_DriverShared *shared;
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struct Vmxnet3_PMConf *pm_conf;
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struct Vmxnet3_TxQueueDesc *tqd_start; /* all tx queue desc */
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struct Vmxnet3_RxQueueDesc *rqd_start; /* all rx queue desc */
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struct net_device *netdev;
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struct pci_dev *pdev;
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u8 __iomem *hw_addr0; /* for BAR 0 */
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u8 __iomem *hw_addr1; /* for BAR 1 */
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u8 version;
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#ifdef VMXNET3_RSS
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struct UPT1_RSSConf *rss_conf;
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bool rss;
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#endif
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u32 num_rx_queues;
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u32 num_tx_queues;
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/* rx buffer related */
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unsigned skb_buf_size;
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int rx_buf_per_pkt; /* only apply to the 1st ring */
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dma_addr_t shared_pa;
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dma_addr_t queue_desc_pa;
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dma_addr_t coal_conf_pa;
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/* Wake-on-LAN */
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u32 wol;
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/* Link speed */
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u32 link_speed; /* in mbps */
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u64 tx_timeout_count;
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/* Ring sizes */
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u32 tx_ring_size;
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u32 rx_ring_size;
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u32 rx_ring2_size;
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/* Size of buffer in the data ring */
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u16 txdata_desc_size;
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u16 rxdata_desc_size;
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bool rxdataring_enabled;
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bool default_rss_fields;
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enum Vmxnet3_RSSField rss_fields;
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struct work_struct work;
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unsigned long state; /* VMXNET3_STATE_BIT_xxx */
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int share_intr;
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struct Vmxnet3_CoalesceScheme *coal_conf;
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bool default_coal_mode;
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dma_addr_t adapter_pa;
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dma_addr_t pm_conf_pa;
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dma_addr_t rss_conf_pa;
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bool queuesExtEnabled;
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struct Vmxnet3_RingBufferSize ringBufSize;
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u32 devcap_supported[8];
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u32 ptcap_supported[8];
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u32 dev_caps[8];
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u16 tx_prod_offset;
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u16 rx_prod_offset;
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u16 rx_prod2_offset;
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};
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#define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \
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writel((val), (adapter)->hw_addr0 + (reg))
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#define VMXNET3_READ_BAR0_REG(adapter, reg) \
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readl((adapter)->hw_addr0 + (reg))
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#define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \
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writel((val), (adapter)->hw_addr1 + (reg))
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#define VMXNET3_READ_BAR1_REG(adapter, reg) \
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readl((adapter)->hw_addr1 + (reg))
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#define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5)
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#define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \
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((rq)->rx_ring[ring_idx].size >> 3)
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#define VMXNET3_GET_ADDR_LO(dma) ((u32)(dma))
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#define VMXNET3_GET_ADDR_HI(dma) ((u32)(((u64)(dma)) >> 32))
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#define VMXNET3_VERSION_GE_2(adapter) \
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(adapter->version >= VMXNET3_REV_2 + 1)
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#define VMXNET3_VERSION_GE_3(adapter) \
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(adapter->version >= VMXNET3_REV_3 + 1)
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#define VMXNET3_VERSION_GE_4(adapter) \
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(adapter->version >= VMXNET3_REV_4 + 1)
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#define VMXNET3_VERSION_GE_5(adapter) \
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(adapter->version >= VMXNET3_REV_5 + 1)
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#define VMXNET3_VERSION_GE_6(adapter) \
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(adapter->version >= VMXNET3_REV_6 + 1)
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#define VMXNET3_VERSION_GE_7(adapter) \
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(adapter->version >= VMXNET3_REV_7 + 1)
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/* must be a multiple of VMXNET3_RING_SIZE_ALIGN */
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#define VMXNET3_DEF_TX_RING_SIZE 512
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#define VMXNET3_DEF_RX_RING_SIZE 1024
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#define VMXNET3_DEF_RX_RING2_SIZE 512
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#define VMXNET3_DEF_RXDATA_DESC_SIZE 128
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#define VMXNET3_MAX_ETH_HDR_SIZE 22
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#define VMXNET3_MAX_SKB_BUF_SIZE (3*1024)
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#define VMXNET3_GET_RING_IDX(adapter, rqID) \
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((rqID >= adapter->num_rx_queues && \
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rqID < 2 * adapter->num_rx_queues) ? 1 : 0) \
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#define VMXNET3_RX_DATA_RING(adapter, rqID) \
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(rqID >= 2 * adapter->num_rx_queues && \
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rqID < 3 * adapter->num_rx_queues) \
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#define VMXNET3_COAL_STATIC_DEFAULT_DEPTH 64
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#define VMXNET3_COAL_RBC_RATE(usecs) (1000000 / usecs)
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#define VMXNET3_COAL_RBC_USECS(rbc_rate) (1000000 / rbc_rate)
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#define VMXNET3_RSS_FIELDS_DEFAULT (VMXNET3_RSS_FIELDS_TCPIP4 | \
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VMXNET3_RSS_FIELDS_TCPIP6)
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int
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vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter);
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int
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vmxnet3_activate_dev(struct vmxnet3_adapter *adapter);
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void
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vmxnet3_force_close(struct vmxnet3_adapter *adapter);
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void
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vmxnet3_reset_dev(struct vmxnet3_adapter *adapter);
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void
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vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter);
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|
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void
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vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter);
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|
|
|
netdev_features_t
|
|
vmxnet3_fix_features(struct net_device *netdev, netdev_features_t features);
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|
|
|
netdev_features_t
|
|
vmxnet3_features_check(struct sk_buff *skb,
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|
struct net_device *netdev, netdev_features_t features);
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|
|
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int
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|
vmxnet3_set_features(struct net_device *netdev, netdev_features_t features);
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|
|
|
int
|
|
vmxnet3_create_queues(struct vmxnet3_adapter *adapter,
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|
u32 tx_ring_size, u32 rx_ring_size, u32 rx_ring2_size,
|
|
u16 txdata_desc_size, u16 rxdata_desc_size);
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|
|
|
void vmxnet3_set_ethtool_ops(struct net_device *netdev);
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|
|
|
void vmxnet3_get_stats64(struct net_device *dev,
|
|
struct rtnl_link_stats64 *stats);
|
|
bool vmxnet3_check_ptcapability(u32 cap_supported, u32 cap);
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|
|
|
extern char vmxnet3_driver_name[];
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#endif
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