161 lines
4.9 KiB
C
161 lines
4.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/*
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* Copyright (C) 2012-2014, 2018, 2020-2021 Intel Corporation
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* Copyright (C) 2013-2015 Intel Mobile Communications GmbH
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* Copyright (C) 2016-2017 Intel Deutschland GmbH
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*/
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#ifndef __iwl_fw_api_phy_ctxt_h__
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#define __iwl_fw_api_phy_ctxt_h__
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/* Supported bands */
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#define PHY_BAND_5 (0)
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#define PHY_BAND_24 (1)
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#define PHY_BAND_6 (2)
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/* Supported channel width, vary if there is VHT support */
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#define IWL_PHY_CHANNEL_MODE20 0x0
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#define IWL_PHY_CHANNEL_MODE40 0x1
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#define IWL_PHY_CHANNEL_MODE80 0x2
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#define IWL_PHY_CHANNEL_MODE160 0x3
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/* and 320 MHz for EHT */
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#define IWL_PHY_CHANNEL_MODE320 0x4
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/*
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* Control channel position:
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* For legacy set bit means upper channel, otherwise lower.
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* For VHT - bit-2 marks if the control is lower/upper relative to center-freq
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* bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
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* center_freq
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* For EHT - bit-3 is used for extended distance
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* |
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* 40Mhz |____|____|
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* 80Mhz |____|____|____|____|
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* 160Mhz |____|____|____|____|____|____|____|____|
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* 320MHz |____|____|____|____|____|____|____|____|____|____|____|____|____|____|____|____|
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* code 1011 1010 1001 1000 0011 0010 0001 0000 0100 0101 0110 0111 1100 1101 1110 1111
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*/
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#define IWL_PHY_CTRL_POS_ABOVE 0x4
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#define IWL_PHY_CTRL_POS_OFFS_EXT 0x8
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#define IWL_PHY_CTRL_POS_OFFS_MSK 0x3
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/*
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* struct iwl_fw_channel_info_v1 - channel information
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*
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* @band: PHY_BAND_*
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* @channel: channel number
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* @width: PHY_[VHT|LEGACY]_CHANNEL_*
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* @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
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*/
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struct iwl_fw_channel_info_v1 {
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u8 band;
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u8 channel;
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u8 width;
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u8 ctrl_pos;
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} __packed; /* CHANNEL_CONFIG_API_S_VER_1 */
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/*
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* struct iwl_fw_channel_info - channel information
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*
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* @channel: channel number
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* @band: PHY_BAND_*
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* @width: PHY_[VHT|LEGACY]_CHANNEL_*
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* @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
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* @reserved: for future use and alignment
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*/
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struct iwl_fw_channel_info {
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__le32 channel;
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u8 band;
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u8 width;
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u8 ctrl_pos;
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u8 reserved;
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} __packed; /*CHANNEL_CONFIG_API_S_VER_2 */
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#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
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#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
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(0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
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#define PHY_RX_CHAIN_VALID_POS (1)
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#define PHY_RX_CHAIN_VALID_MSK \
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(0x7 << PHY_RX_CHAIN_VALID_POS)
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#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
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#define PHY_RX_CHAIN_FORCE_SEL_MSK \
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(0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
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#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
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#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
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(0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
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#define PHY_RX_CHAIN_CNT_POS (10)
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#define PHY_RX_CHAIN_CNT_MSK \
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(0x3 << PHY_RX_CHAIN_CNT_POS)
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#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
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#define PHY_RX_CHAIN_MIMO_CNT_MSK \
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(0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
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#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
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#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
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(0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
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/* TODO: fix the value, make it depend on firmware at runtime? */
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#define NUM_PHY_CTX 3
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/* TODO: complete missing documentation */
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/**
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* struct iwl_phy_context_cmd_tail - tail of iwl_phy_ctx_cmd for alignment with
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* various channel structures.
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*
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* @txchain_info: ???
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* @rxchain_info: ???
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* @acquisition_data: ???
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* @dsp_cfg_flags: set to 0
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*/
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struct iwl_phy_context_cmd_tail {
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__le32 txchain_info;
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__le32 rxchain_info;
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__le32 acquisition_data;
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__le32 dsp_cfg_flags;
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} __packed;
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/**
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* struct iwl_phy_context_cmd - config of the PHY context
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* ( PHY_CONTEXT_CMD = 0x8 )
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* @id_and_color: ID and color of the relevant Binding
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* @action: action to perform, one of FW_CTXT_ACTION_*
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* @apply_time: 0 means immediate apply and context switch.
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* other value means apply new params after X usecs
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* @tx_param_color: ???
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* @ci: channel info
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* @tail: command tail
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*/
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struct iwl_phy_context_cmd_v1 {
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/* COMMON_INDEX_HDR_API_S_VER_1 */
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__le32 id_and_color;
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__le32 action;
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/* PHY_CONTEXT_DATA_API_S_VER_3 */
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__le32 apply_time;
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__le32 tx_param_color;
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struct iwl_fw_channel_info ci;
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struct iwl_phy_context_cmd_tail tail;
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} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
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/**
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* struct iwl_phy_context_cmd - config of the PHY context
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* ( PHY_CONTEXT_CMD = 0x8 )
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* @id_and_color: ID and color of the relevant Binding
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* @action: action to perform, one of FW_CTXT_ACTION_*
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* @lmac_id: the lmac id the phy context belongs to
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* @ci: channel info
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* @rxchain_info: ???
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* @dsp_cfg_flags: set to 0
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* @reserved: reserved to align to 64 bit
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*/
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struct iwl_phy_context_cmd {
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/* COMMON_INDEX_HDR_API_S_VER_1 */
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__le32 id_and_color;
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__le32 action;
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/* PHY_CONTEXT_DATA_API_S_VER_3, PHY_CONTEXT_DATA_API_S_VER_4 */
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struct iwl_fw_channel_info ci;
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__le32 lmac_id;
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__le32 rxchain_info; /* reserved in _VER_4 */
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__le32 dsp_cfg_flags;
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__le32 reserved;
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} __packed; /* PHY_CONTEXT_CMD_API_VER_3, PHY_CONTEXT_CMD_API_VER_4 */
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#endif /* __iwl_fw_api_phy_ctxt_h__ */
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