310 lines
9.4 KiB
C
310 lines
9.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020
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* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/platform_device.h>
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#include "pinctrl-imx.h"
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enum imxrt1050_pads {
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IMXRT1050_PAD_RESERVE0,
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IMXRT1050_PAD_RESERVE1,
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IMXRT1050_PAD_RESERVE2,
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IMXRT1050_PAD_RESERVE3,
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IMXRT1050_PAD_RESERVE4,
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IMXRT1050_PAD_EMC_00,
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IMXRT1050_PAD_EMC_01,
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IMXRT1050_PAD_EMC_02,
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IMXRT1050_PAD_EMC_03,
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IMXRT1050_PAD_EMC_04,
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IMXRT1050_PAD_EMC_05,
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IMXRT1050_PAD_EMC_06,
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IMXRT1050_PAD_EMC_07,
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IMXRT1050_PAD_EMC_08,
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IMXRT1050_PAD_EMC_09,
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IMXRT1050_PAD_EMC_10,
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IMXRT1050_PAD_EMC_11,
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IMXRT1050_PAD_EMC_12,
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IMXRT1050_PAD_EMC_13,
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IMXRT1050_PAD_EMC_14,
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IMXRT1050_PAD_EMC_15,
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IMXRT1050_PAD_EMC_16,
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IMXRT1050_PAD_EMC_17,
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IMXRT1050_PAD_EMC_18,
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IMXRT1050_PAD_EMC_19,
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IMXRT1050_PAD_EMC_20,
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IMXRT1050_PAD_EMC_21,
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IMXRT1050_PAD_EMC_22,
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IMXRT1050_PAD_EMC_23,
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IMXRT1050_PAD_EMC_24,
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IMXRT1050_PAD_EMC_25,
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IMXRT1050_PAD_EMC_26,
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IMXRT1050_PAD_EMC_27,
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IMXRT1050_PAD_EMC_28,
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IMXRT1050_PAD_EMC_29,
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IMXRT1050_PAD_EMC_30,
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IMXRT1050_PAD_EMC_31,
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IMXRT1050_PAD_EMC_32,
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IMXRT1050_PAD_EMC_33,
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IMXRT1050_PAD_EMC_34,
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IMXRT1050_PAD_EMC_35,
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IMXRT1050_PAD_EMC_36,
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IMXRT1050_PAD_EMC_37,
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IMXRT1050_PAD_EMC_38,
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IMXRT1050_PAD_EMC_39,
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IMXRT1050_PAD_EMC_40,
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IMXRT1050_PAD_EMC_41,
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IMXRT1050_PAD_AD_B0_00,
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IMXRT1050_PAD_AD_B0_01,
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IMXRT1050_PAD_AD_B0_02,
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IMXRT1050_PAD_AD_B0_03,
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IMXRT1050_PAD_AD_B0_04,
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IMXRT1050_PAD_AD_B0_05,
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IMXRT1050_PAD_AD_B0_06,
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IMXRT1050_PAD_AD_B0_07,
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IMXRT1050_PAD_AD_B0_08,
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IMXRT1050_PAD_AD_B0_09,
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IMXRT1050_PAD_AD_B0_10,
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IMXRT1050_PAD_AD_B0_11,
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IMXRT1050_PAD_AD_B0_12,
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IMXRT1050_PAD_AD_B0_13,
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IMXRT1050_PAD_AD_B0_14,
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IMXRT1050_PAD_AD_B0_15,
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IMXRT1050_PAD_AD_B1_00,
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IMXRT1050_PAD_AD_B1_01,
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IMXRT1050_PAD_AD_B1_02,
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IMXRT1050_PAD_AD_B1_03,
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IMXRT1050_PAD_AD_B1_04,
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IMXRT1050_PAD_AD_B1_05,
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IMXRT1050_PAD_AD_B1_06,
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IMXRT1050_PAD_AD_B1_07,
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IMXRT1050_PAD_AD_B1_08,
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IMXRT1050_PAD_AD_B1_09,
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IMXRT1050_PAD_AD_B1_10,
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IMXRT1050_PAD_AD_B1_11,
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IMXRT1050_PAD_AD_B1_12,
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IMXRT1050_PAD_AD_B1_13,
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IMXRT1050_PAD_AD_B1_14,
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IMXRT1050_PAD_AD_B1_15,
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IMXRT1050_PAD_B0_00,
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IMXRT1050_PAD_B0_01,
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IMXRT1050_PAD_B0_02,
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IMXRT1050_PAD_B0_03,
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IMXRT1050_PAD_B0_04,
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IMXRT1050_PAD_B0_05,
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IMXRT1050_PAD_B0_06,
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IMXRT1050_PAD_B0_07,
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IMXRT1050_PAD_B0_08,
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IMXRT1050_PAD_B0_09,
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IMXRT1050_PAD_B0_10,
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IMXRT1050_PAD_B0_11,
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IMXRT1050_PAD_B0_12,
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IMXRT1050_PAD_B0_13,
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IMXRT1050_PAD_B0_14,
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IMXRT1050_PAD_B0_15,
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IMXRT1050_PAD_B1_00,
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IMXRT1050_PAD_B1_01,
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IMXRT1050_PAD_B1_02,
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IMXRT1050_PAD_B1_03,
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IMXRT1050_PAD_B1_04,
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IMXRT1050_PAD_B1_05,
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IMXRT1050_PAD_B1_06,
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IMXRT1050_PAD_B1_07,
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IMXRT1050_PAD_B1_08,
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IMXRT1050_PAD_B1_09,
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IMXRT1050_PAD_B1_10,
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IMXRT1050_PAD_B1_11,
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IMXRT1050_PAD_B1_12,
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IMXRT1050_PAD_B1_13,
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IMXRT1050_PAD_B1_14,
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IMXRT1050_PAD_B1_15,
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IMXRT1050_PAD_SD_B0_00,
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IMXRT1050_PAD_SD_B0_01,
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IMXRT1050_PAD_SD_B0_02,
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IMXRT1050_PAD_SD_B0_03,
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IMXRT1050_PAD_SD_B0_04,
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IMXRT1050_PAD_SD_B0_05,
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IMXRT1050_PAD_SD_B1_00,
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IMXRT1050_PAD_SD_B1_01,
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IMXRT1050_PAD_SD_B1_02,
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IMXRT1050_PAD_SD_B1_03,
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IMXRT1050_PAD_SD_B1_04,
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IMXRT1050_PAD_SD_B1_05,
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IMXRT1050_PAD_SD_B1_06,
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IMXRT1050_PAD_SD_B1_07,
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IMXRT1050_PAD_SD_B1_08,
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IMXRT1050_PAD_SD_B1_09,
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IMXRT1050_PAD_SD_B1_10,
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IMXRT1050_PAD_SD_B1_11,
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};
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/* Pad names for the pinmux subsystem */
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static const struct pinctrl_pin_desc imxrt1050_pinctrl_pads[] = {
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IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE0),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE1),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE2),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE3),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE4),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_00),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_01),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_02),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_03),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_04),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_05),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_06),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_07),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_08),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_09),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_10),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_11),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_12),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_13),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_14),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_15),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_16),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_17),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_18),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_19),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_20),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_21),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_22),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_23),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_24),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_25),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_26),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_27),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_28),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_29),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_30),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_31),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_32),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_33),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_34),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_35),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_36),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_37),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_38),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_39),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_40),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_41),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_00),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_01),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_02),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_03),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_04),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_05),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_06),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_07),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_08),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_09),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_10),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_11),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_12),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_13),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_14),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_15),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_00),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_01),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_02),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_03),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_04),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_05),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_06),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_07),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_08),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_09),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_10),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_11),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_12),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_13),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_14),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_15),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_00),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_01),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_02),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_03),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_04),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_05),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_06),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_07),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_08),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_09),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_10),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_11),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_12),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_13),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_14),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_15),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_00),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_01),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_02),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_03),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_04),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_05),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_06),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_07),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_08),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_09),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_10),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_11),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_12),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_13),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_14),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_15),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_00),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_01),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_02),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_03),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_04),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_05),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_00),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_01),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_02),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_03),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_04),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_05),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_06),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_07),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_08),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_09),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_10),
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IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_11),
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};
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static const struct imx_pinctrl_soc_info imxrt1050_pinctrl_info = {
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.pins = imxrt1050_pinctrl_pads,
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.npins = ARRAY_SIZE(imxrt1050_pinctrl_pads),
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.gpr_compatible = "fsl,imxrt1050-iomuxc-gpr",
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};
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static const struct of_device_id imxrt1050_pinctrl_of_match[] = {
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{ .compatible = "fsl,imxrt1050-iomuxc", .data = &imxrt1050_pinctrl_info, },
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{ /* sentinel */ }
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};
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static int imxrt1050_pinctrl_probe(struct platform_device *pdev)
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{
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return imx_pinctrl_probe(pdev, &imxrt1050_pinctrl_info);
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}
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static struct platform_driver imxrt1050_pinctrl_driver = {
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.driver = {
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.name = "imxrt1050-pinctrl",
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.of_match_table = of_match_ptr(imxrt1050_pinctrl_of_match),
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.suppress_bind_attrs = true,
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},
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.probe = imxrt1050_pinctrl_probe,
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};
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static int __init imxrt1050_pinctrl_init(void)
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{
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return platform_driver_register(&imxrt1050_pinctrl_driver);
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}
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arch_initcall(imxrt1050_pinctrl_init);
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