484 lines
9.8 KiB
C
484 lines
9.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2022 ARM Limited.
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*/
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#include <errno.h>
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#include <signal.h>
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#include <stdbool.h>
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#include <stddef.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <sys/auxv.h>
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#include <sys/prctl.h>
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#include <asm/hwcap.h>
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#include <asm/sigcontext.h>
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#include <asm/unistd.h>
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#include "../../kselftest.h"
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#define TESTS_PER_HWCAP 2
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/*
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* Function expected to generate SIGILL when the feature is not
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* supported and return when it is supported. If SIGILL is generated
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* then the handler must be able to skip over the instruction safely.
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*
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* Note that it is expected that for many architecture extensions
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* there are no specific traps due to no architecture state being
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* added so we may not fault if running on a kernel which doesn't know
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* to add the hwcap.
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*/
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typedef void (*sigill_fn)(void);
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static void cssc_sigill(void)
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{
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/* CNT x0, x0 */
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asm volatile(".inst 0xdac01c00" : : : "x0");
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}
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static void rng_sigill(void)
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{
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asm volatile("mrs x0, S3_3_C2_C4_0" : : : "x0");
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}
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static void sme_sigill(void)
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{
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/* RDSVL x0, #0 */
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asm volatile(".inst 0x04bf5800" : : : "x0");
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}
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static void sme2_sigill(void)
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{
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/* SMSTART ZA */
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asm volatile("msr S0_3_C4_C5_3, xzr" : : : );
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/* ZERO ZT0 */
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asm volatile(".inst 0xc0480001" : : : );
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/* SMSTOP */
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asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
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}
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static void sme2p1_sigill(void)
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{
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/* SMSTART SM */
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asm volatile("msr S0_3_C4_C3_3, xzr" : : : );
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/* BFCLAMP { Z0.H - Z1.H }, Z0.H, Z0.H */
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asm volatile(".inst 0xc120C000" : : : );
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/* SMSTOP */
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asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
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}
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static void smei16i32_sigill(void)
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{
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/* SMSTART */
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asm volatile("msr S0_3_C4_C7_3, xzr" : : : );
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/* SMOPA ZA0.S, P0/M, P0/M, Z0.B, Z0.B */
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asm volatile(".inst 0xa0800000" : : : );
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/* SMSTOP */
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asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
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}
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static void smebi32i32_sigill(void)
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{
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/* SMSTART */
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asm volatile("msr S0_3_C4_C7_3, xzr" : : : );
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/* BMOPA ZA0.S, P0/M, P0/M, Z0.B, Z0.B */
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asm volatile(".inst 0x80800008" : : : );
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/* SMSTOP */
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asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
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}
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static void smeb16b16_sigill(void)
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{
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/* SMSTART */
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asm volatile("msr S0_3_C4_C7_3, xzr" : : : );
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/* BFADD ZA.H[W0, 0], {Z0.H-Z1.H} */
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asm volatile(".inst 0xC1E41C00" : : : );
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/* SMSTOP */
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asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
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}
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static void smef16f16_sigill(void)
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{
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/* SMSTART */
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asm volatile("msr S0_3_C4_C7_3, xzr" : : : );
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/* FADD ZA.H[W0, 0], { Z0.H-Z1.H } */
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asm volatile(".inst 0xc1a41C00" : : : );
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/* SMSTOP */
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asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
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}
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static void sve_sigill(void)
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{
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/* RDVL x0, #0 */
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asm volatile(".inst 0x04bf5000" : : : "x0");
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}
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static void sve2_sigill(void)
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{
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/* SQABS Z0.b, P0/M, Z0.B */
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asm volatile(".inst 0x4408A000" : : : "z0");
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}
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static void sve2p1_sigill(void)
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{
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/* BFADD Z0.H, Z0.H, Z0.H */
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asm volatile(".inst 0x65000000" : : : "z0");
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}
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static void sveaes_sigill(void)
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{
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/* AESD z0.b, z0.b, z0.b */
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asm volatile(".inst 0x4522e400" : : : "z0");
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}
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static void svepmull_sigill(void)
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{
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/* PMULLB Z0.Q, Z0.D, Z0.D */
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asm volatile(".inst 0x45006800" : : : "z0");
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}
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static void svebitperm_sigill(void)
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{
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/* BDEP Z0.B, Z0.B, Z0.B */
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asm volatile(".inst 0x4500b400" : : : "z0");
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}
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static void svesha3_sigill(void)
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{
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/* EOR3 Z0.D, Z0.D, Z0.D, Z0.D */
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asm volatile(".inst 0x4203800" : : : "z0");
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}
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static void svesm4_sigill(void)
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{
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/* SM4E Z0.S, Z0.S, Z0.S */
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asm volatile(".inst 0x4523e000" : : : "z0");
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}
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static void svei8mm_sigill(void)
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{
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/* USDOT Z0.S, Z0.B, Z0.B[0] */
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asm volatile(".inst 0x44a01800" : : : "z0");
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}
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static void svef32mm_sigill(void)
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{
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/* FMMLA Z0.S, Z0.S, Z0.S */
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asm volatile(".inst 0x64a0e400" : : : "z0");
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}
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static void svef64mm_sigill(void)
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{
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/* FMMLA Z0.D, Z0.D, Z0.D */
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asm volatile(".inst 0x64e0e400" : : : "z0");
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}
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static void svebf16_sigill(void)
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{
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/* BFCVT Z0.H, P0/M, Z0.S */
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asm volatile(".inst 0x658aa000" : : : "z0");
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}
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static const struct hwcap_data {
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const char *name;
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unsigned long at_hwcap;
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unsigned long hwcap_bit;
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const char *cpuinfo;
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sigill_fn sigill_fn;
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bool sigill_reliable;
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} hwcaps[] = {
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{
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.name = "CSSC",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_CSSC,
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.cpuinfo = "cssc",
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.sigill_fn = cssc_sigill,
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},
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{
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.name = "RNG",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_RNG,
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.cpuinfo = "rng",
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.sigill_fn = rng_sigill,
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},
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{
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.name = "RPRFM",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_RPRFM,
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.cpuinfo = "rprfm",
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},
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{
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.name = "SME",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SME,
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.cpuinfo = "sme",
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.sigill_fn = sme_sigill,
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.sigill_reliable = true,
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},
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{
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.name = "SME2",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SME2,
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.cpuinfo = "sme2",
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.sigill_fn = sme2_sigill,
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.sigill_reliable = true,
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},
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{
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.name = "SME 2.1",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SME2P1,
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.cpuinfo = "sme2p1",
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.sigill_fn = sme2p1_sigill,
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},
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{
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.name = "SME I16I32",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SME_I16I32,
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.cpuinfo = "smei16i32",
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.sigill_fn = smei16i32_sigill,
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},
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{
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.name = "SME BI32I32",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SME_BI32I32,
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.cpuinfo = "smebi32i32",
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.sigill_fn = smebi32i32_sigill,
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},
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{
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.name = "SME B16B16",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SME_B16B16,
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.cpuinfo = "smeb16b16",
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.sigill_fn = smeb16b16_sigill,
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},
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{
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.name = "SME F16F16",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SME_F16F16,
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.cpuinfo = "smef16f16",
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.sigill_fn = smef16f16_sigill,
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},
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{
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.name = "SVE",
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.at_hwcap = AT_HWCAP,
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.hwcap_bit = HWCAP_SVE,
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.cpuinfo = "sve",
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.sigill_fn = sve_sigill,
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.sigill_reliable = true,
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},
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{
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.name = "SVE 2",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SVE2,
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.cpuinfo = "sve2",
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.sigill_fn = sve2_sigill,
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},
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{
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.name = "SVE 2.1",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SVE2P1,
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.cpuinfo = "sve2p1",
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.sigill_fn = sve2p1_sigill,
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},
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{
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.name = "SVE AES",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SVEAES,
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.cpuinfo = "sveaes",
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.sigill_fn = sveaes_sigill,
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},
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{
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.name = "SVE2 PMULL",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SVEPMULL,
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.cpuinfo = "svepmull",
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.sigill_fn = svepmull_sigill,
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},
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{
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.name = "SVE2 BITPERM",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SVEBITPERM,
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.cpuinfo = "svebitperm",
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.sigill_fn = svebitperm_sigill,
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},
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{
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.name = "SVE2 SHA3",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SVESHA3,
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.cpuinfo = "svesha3",
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.sigill_fn = svesha3_sigill,
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},
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{
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.name = "SVE2 SM4",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SVESM4,
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.cpuinfo = "svesm4",
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.sigill_fn = svesm4_sigill,
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},
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{
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.name = "SVE2 I8MM",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SVEI8MM,
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.cpuinfo = "svei8mm",
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.sigill_fn = svei8mm_sigill,
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},
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{
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.name = "SVE2 F32MM",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SVEF32MM,
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.cpuinfo = "svef32mm",
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.sigill_fn = svef32mm_sigill,
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},
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{
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.name = "SVE2 F64MM",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SVEF64MM,
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.cpuinfo = "svef64mm",
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.sigill_fn = svef64mm_sigill,
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},
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{
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.name = "SVE2 BF16",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SVEBF16,
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.cpuinfo = "svebf16",
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.sigill_fn = svebf16_sigill,
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},
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{
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.name = "SVE2 EBF16",
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.at_hwcap = AT_HWCAP2,
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.hwcap_bit = HWCAP2_SVE_EBF16,
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.cpuinfo = "sveebf16",
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},
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};
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static bool seen_sigill;
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static void handle_sigill(int sig, siginfo_t *info, void *context)
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{
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ucontext_t *uc = context;
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seen_sigill = true;
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/* Skip over the offending instruction */
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uc->uc_mcontext.pc += 4;
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}
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bool cpuinfo_present(const char *name)
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{
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FILE *f;
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char buf[2048], name_space[30], name_newline[30];
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char *s;
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/*
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* The feature should appear with a leading space and either a
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* trailing space or a newline.
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*/
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snprintf(name_space, sizeof(name_space), " %s ", name);
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snprintf(name_newline, sizeof(name_newline), " %s\n", name);
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f = fopen("/proc/cpuinfo", "r");
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if (!f) {
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ksft_print_msg("Failed to open /proc/cpuinfo\n");
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return false;
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}
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while (fgets(buf, sizeof(buf), f)) {
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/* Features: line? */
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if (strncmp(buf, "Features\t:", strlen("Features\t:")) != 0)
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continue;
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/* All CPUs should be symmetric, don't read any more */
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fclose(f);
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s = strstr(buf, name_space);
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if (s)
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return true;
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s = strstr(buf, name_newline);
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if (s)
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return true;
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return false;
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}
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ksft_print_msg("Failed to find Features in /proc/cpuinfo\n");
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fclose(f);
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return false;
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}
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int main(void)
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{
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const struct hwcap_data *hwcap;
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int i, ret;
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bool have_cpuinfo, have_hwcap;
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struct sigaction sa;
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ksft_print_header();
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ksft_set_plan(ARRAY_SIZE(hwcaps) * TESTS_PER_HWCAP);
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memset(&sa, 0, sizeof(sa));
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sa.sa_sigaction = handle_sigill;
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sa.sa_flags = SA_RESTART | SA_SIGINFO;
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sigemptyset(&sa.sa_mask);
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ret = sigaction(SIGILL, &sa, NULL);
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if (ret < 0)
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ksft_exit_fail_msg("Failed to install SIGILL handler: %s (%d)\n",
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strerror(errno), errno);
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for (i = 0; i < ARRAY_SIZE(hwcaps); i++) {
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hwcap = &hwcaps[i];
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have_hwcap = getauxval(hwcap->at_hwcap) & hwcap->hwcap_bit;
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have_cpuinfo = cpuinfo_present(hwcap->cpuinfo);
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if (have_hwcap)
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ksft_print_msg("%s present\n", hwcap->name);
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ksft_test_result(have_hwcap == have_cpuinfo,
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"cpuinfo_match_%s\n", hwcap->name);
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if (hwcap->sigill_fn) {
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seen_sigill = false;
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hwcap->sigill_fn();
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if (have_hwcap) {
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/* Should be able to use the extension */
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ksft_test_result(!seen_sigill, "sigill_%s\n",
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hwcap->name);
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} else if (hwcap->sigill_reliable) {
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/* Guaranteed a SIGILL */
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ksft_test_result(seen_sigill, "sigill_%s\n",
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hwcap->name);
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} else {
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/* Missing SIGILL might be fine */
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ksft_print_msg("SIGILL %sreported for %s\n",
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seen_sigill ? "" : "not ",
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hwcap->name);
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ksft_test_result_skip("sigill_%s\n",
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hwcap->name);
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}
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} else {
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ksft_test_result_skip("sigill_%s\n",
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hwcap->name);
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}
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}
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ksft_print_cnts();
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return 0;
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}
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