186 lines
4.7 KiB
YAML
186 lines
4.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip I2S/TDM Controller
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description:
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The Rockchip I2S/TDM Controller is a Time Division Multiplexed
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audio interface found in various Rockchip SoCs, allowing up
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to 8 channels of audio over a serial interface.
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maintainers:
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- Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
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allOf:
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- $ref: dai-common.yaml#
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properties:
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compatible:
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enum:
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- rockchip,px30-i2s-tdm
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- rockchip,rk1808-i2s-tdm
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- rockchip,rk3308-i2s-tdm
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- rockchip,rk3568-i2s-tdm
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- rockchip,rk3588-i2s-tdm
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- rockchip,rv1126-i2s-tdm
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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dmas:
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minItems: 1
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maxItems: 2
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dma-names:
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minItems: 1
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maxItems: 2
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items:
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enum:
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- rx
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- tx
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clocks:
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minItems: 3
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items:
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- description: clock for TX
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- description: clock for RX
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- description: AHB clock driving the interface
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- description:
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Parent clock for mclk_tx (only required when using mclk-calibrate)
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- description:
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Parent clock for mclk_rx (only required when using mclk-calibrate)
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- description:
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Clock for sample rates that are an integer multiple of 8000
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(only required when using mclk-calibrate)
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- description:
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Clock for sample rates that are an integer multiple of 11025
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(only required when using mclk-calibrate)
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clock-names:
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minItems: 3
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items:
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- const: mclk_tx
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- const: mclk_rx
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- const: hclk
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- const: mclk_tx_src
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- const: mclk_rx_src
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- const: mclk_root0
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- const: mclk_root1
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resets:
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minItems: 1
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maxItems: 2
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description: resets for the tx and rx directions
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reset-names:
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minItems: 1
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maxItems: 2
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items:
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enum:
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- tx-m
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- rx-m
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rockchip,grf:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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The phandle of the syscon node for the GRF register.
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rockchip,trcm-sync-tx-only:
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type: boolean
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description: Use TX BCLK/LRCK for both TX and RX.
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rockchip,trcm-sync-rx-only:
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type: boolean
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description: Use RX BCLK/LRCK for both TX and RX.
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"#sound-dai-cells":
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const: 0
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rockchip,i2s-rx-route:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description:
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Defines the mapping of I2S RX sdis to I2S data bus lines.
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By default, they are mapped one-to-one.
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rockchip,i2s-rx-route = <3> would mean sdi3 is receiving from data0.
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maxItems: 4
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items:
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enum: [0, 1, 2, 3]
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rockchip,i2s-tx-route:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description:
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Defines the mapping of I2S TX sdos to I2S data bus lines.
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By default, they are mapped one-to-one.
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rockchip,i2s-tx-route = <3> would mean sdo3 is sending to data0.
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maxItems: 4
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items:
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enum: [0, 1, 2, 3]
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rockchip,io-multiplex:
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description:
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Specify that the GPIO lines on the I2S bus are multiplexed such that
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the direction (input/output) needs to be dynamically adjusted.
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type: boolean
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required:
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- compatible
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- reg
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- interrupts
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- dmas
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- dma-names
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- clocks
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- clock-names
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- resets
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- reset-names
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- "#sound-dai-cells"
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3568-cru.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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i2s@fe410000 {
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compatible = "rockchip,rk3568-i2s-tdm";
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reg = <0x0 0xfe410000 0x0 0x1000>;
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interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>,
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<&cru HCLK_I2S1_8CH>;
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clock-names = "mclk_tx", "mclk_rx", "hclk";
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dmas = <&dmac1 3>, <&dmac1 2>;
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dma-names = "rx", "tx";
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resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>;
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reset-names = "tx-m", "rx-m";
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rockchip,trcm-sync-tx-only;
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rockchip,grf = <&grf>;
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#sound-dai-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 =
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<&i2s1m0_sclktx
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&i2s1m0_sclkrx
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&i2s1m0_lrcktx
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&i2s1m0_lrckrx
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&i2s1m0_sdi0
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&i2s1m0_sdi1
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&i2s1m0_sdi2
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&i2s1m0_sdi3
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&i2s1m0_sdo0
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&i2s1m0_sdo1
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&i2s1m0_sdo2
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&i2s1m0_sdo3>;
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};
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};
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